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US4921815A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of producing a semiconductor memory device having trench capacitors

Assignee: Hitachi Ltd
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Filing: 1988-06-08
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Granted: 1990-05-01
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Expires: 2008-06-08
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Abstract

Abstract A D-RAM is disclosed which isolates the capacitors of memory cells and also isolates the adjacent memory cells by utilizing trenches formed on a semiconductor substrate. The device is particularly intended to the area of each memory cell and prevent the occurrence of a leakage current between the adjacent memory cells. Two side walls of the trench are used as the capacitors of two different memory cells, respectively, and these capacitors are isolated from each other by a thick oxide film that is formed on the bottom of each trench.

Inventors

  • 👤 Hiroyuki Miyazawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 16:18
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/37; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10B41/00; H10B41/30; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0135; H10D84/0144; H10D89/00; H10D89/60; H10D89/601; H10D89/911

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 264 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and MISFET, so as to form a plurality of said memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom, and a step of forming element isolation regions to isolate those elements which are to be formed on said side walls, respectively, said element isolation regions being provided at the bottoms of the trenches and including thick oxide films, the steps of forming element isolation regions and of forming trenches including selectively forming said thick oxide films at the locations of the trenches, said thick oxide films forming the element isolation regions, and forming an epitaxial semiconductor layer on the main surface of the substrate except on said thick oxide films, so as to form the trenches at the location of the thick oxide films; and a step of forming insulating films on said side walls of said trench and conductive layers on said insulating films; wherein each of said capacitors comprise a respective one of said side walls of a trench of said semiconductor substrate, said insulating film and said conductive layer, and said capacitors formed on respective side walls of a trench are isolated from each other by said element isolation regions at the bottom of the trenches and are used as the capacitors of different memory cells.
Claim 2
Independent Claim 264 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and MISFET, so as to form a plurality of said memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom, and a step of forming element isolation regions to isolate those elements which are to be formed on said side walls, respectively, said element isolation regions being provided at the bottoms of the trenches and including thick oxide films, the steps of forming element isolation regions and of forming trenches including selectively forming said thick oxide films at the locations of the trenches, said thick oxide films forming the element isolation regions, and forming an epitaxial semiconductor layer on the main surface of the substrate except on said thick oxide films, so as to form the trenches at the location of the thick oxide films; and a step of forming insulating films on said side walls of said trench and conductive layers on said insulating films; wherein each of said capacitors comprise a respective one of said side walls of a trench of said semiconductor substrate, said insulating film and said conductive layer, and said capacitors formed on respective side walls of a trench are isolated from each other by said element isolation regions at the bottom of the trenches and are used as the capacitors of different memory cells.
Claim 3
Dependent Claim 27 words
A method of producing a semiconductor memory device according to claim 1 wherein said selectively forming thick oxide films is performed before forming the epitaxial semiconductor layer.
Claim 4
Independent Claim 278 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and an MISFET, so as to form a plurality of memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom; a step of forming oxidation resistant films over said side walls of said trenches; a step of introducing impurities for forming channel stopper regions on said bottom of said trenches, said channel stopper regions having the same conductivity type as said semiconductor substrate but a higher impurity concentration; a step of forming first oxidation films on said bottom of said trenches by using said oxidation resistant films as a mask, whereby said first oxidation films are on the channel stopper regions; a step of removing said oxidation against resistant films over said two side walls; a step of forming first dielectric films on said side walls of said trenches, said dielectric films having a thickness that is thinner than that of said first oxidation films; and a step of forming conductive layers on said dielectric films; wherein each of said capacitors comprise a respective one of said side walls of said trench of said semiconductor substrate, said dielectric film and said conductive layer, and the capacitors formed on respective side walls of said trenches are isolated from each other by said first oxidation films and said channel stopper regions on said bottom of said trenches and are used as capacitors of different memory cells.
Claim 5
Independent Claim 278 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and an MISFET, so as to form a plurality of memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom; a step of forming oxidation resistant films over said side walls of said trenches; a step of introducing impurities for forming channel stopper regions on said bottom of said trenches, said channel stopper regions having the same conductivity type as said semiconductor substrate but a higher impurity concentration; a step of forming first oxidation films on said bottom of said trenches by using said oxidation resistant films as a mask, whereby said first oxidation films are on the channel stopper regions; a step of removing said oxidation against resistant films over said two side walls; a step of forming first dielectric films on said side walls of said trenches, said dielectric films having a thickness that is thinner than that of said first oxidation films; and a step of forming conductive layers on said dielectric films; wherein each of said capacitors comprise a respective one of said side walls of said trench of said semiconductor substrate, said dielectric film and said conductive layer, and the capacitors formed on respective side walls of said trenches are isolated from each other by said first oxidation films and said channel stopper regions on said bottom of said trenches and are used as capacitors of different memory cells.
Claim 6
Dependent Claim 72 words
A method of producing a semiconductor memory device according to claim 3 wherein said at least two side walls include two side walls on opposed sides of the bottom; and wherein each of the capacitors include a respective one of the two side walls on opposed sides of the bottom, so as to form two capacitors on said two side walls, which are used as the capacitors of two different memory cells.
Claim 7
Dependent Claim 40 words
A method of producing a semiconductor memory device according to claim 3 wherein said first oxidation film comprises a silicon oxide film, said dielectric film comprises a silicon oxide film, and said oxidation resistant film comprises a silicon nitride film.
Claim 8
Dependent Claim 34 words
A method of producing a semiconductor memory device according to claim 5 wherein the steps of forming said first dielectric films and said conductive layers include forming first insulating films on said conductive layers.
Claim 9
Independent Claim 229 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and an MISFET, so as to form a plurality of memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom; a step of forming oxidation resistant films over said side walls of said trenches; a step of forming first oxidation films on said bottom of said trenches by using said oxidation resistant films as a mask; a step of removing said oxidation resistant films over said side walls; a step of forming first dielectric films on said side walls of said trenches, said first dielectric films having a thickness that is thinner than that of said first oxidation films; and a step of forming conductive layers on said dielectric films; wherein each of said capacitors comprise a respective one of said side walls of said trench of said semiconductor substrate, said dielectric film and said conductive layer, and the capacitors formed on respective side walls of a trench are isolated from each other by said first oxidation films on said bottom of said trenches and are used as the capacitors of different memory cells respectively.
Claim 10
Independent Claim 229 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and an MISFET, so as to form a plurality of memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom; a step of forming oxidation resistant films over said side walls of said trenches; a step of forming first oxidation films on said bottom of said trenches by using said oxidation resistant films as a mask; a step of removing said oxidation resistant films over said side walls; a step of forming first dielectric films on said side walls of said trenches, said first dielectric films having a thickness that is thinner than that of said first oxidation films; and a step of forming conductive layers on said dielectric films; wherein each of said capacitors comprise a respective one of said side walls of said trench of said semiconductor substrate, said dielectric film and said conductive layer, and the capacitors formed on respective side walls of a trench are isolated from each other by said first oxidation films on said bottom of said trenches and are used as the capacitors of different memory cells respectively.
Claim 11
Dependent Claim 72 words
A method of producing a semiconductor memory device according to claim 7 wherein said at least two side walls include two side walls on opposed sides of the bottom; and wherein each of the capacitors include a respective one of the two side walls on opposed sides of the bottom, so as to form two capacitors on said two side walls, which are used as the capacitors of two different memory cells.
Claim 12
Dependent Claim 41 words
A method of producing a semiconductor memory device according to claim 7 wherein said first oxidation films comprise a silicon oxide film, said first dielectric films comprise a silicon oxide film, and said oxidation resistant films comprise a silicon nitride film.
Claim 13
Dependent Claim 34 words
A method of producing a semiconductor memory device according to claim 9 wherein the steps of forming said first dielectric films and said conductive layers include forming first insulating films on said conductive layers.
Claim 14
Independent Claim 247 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and MISFET, so as to form a plurality of said memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom; a step of forming element isolation regions to isolate those elements which are to be formed on said side walls, respectively, said element isolation regions being provided at the bottoms of the trenches and including thick oxide films, the thick oxide films being formed by steps including a step of forming an oxidation resistant film on said two side walls of each of said trenches and a step of selectively oxidizing said semiconductor substrate at the bottom of each of said trenches to form said thick oxide films; and a step of forming insulating films on said side walls of said trench and conductive layers on said insulating films; wherein each of said capacitors comprise a respective one of said side walls of a trench of said semiconductor substrate, said insulating film and said conductive layer, and said capacitors formed on respective side walls of a trench are isolated from each other by said element isolation regions at the bottom of the trenches and are used as the capacitors of different memory cells.
Claim 15
Independent Claim 247 words
A method of producing a semiconductor memory device equipped with memory cells, each memory cell comprising a series circuit of a capacitor and MISFET, so as to form a plurality of said memory cells each having said series circuit, said method comprising: a step of forming trenches on a main surface of a semiconductor substrate, each of said trenches having a bottom and at least two side walls on the sides of the bottom; a step of forming element isolation regions to isolate those elements which are to be formed on said side walls, respectively, said element isolation regions being provided at the bottoms of the trenches and including thick oxide films, the thick oxide films being formed by steps including a step of forming an oxidation resistant film on said two side walls of each of said trenches and a step of selectively oxidizing said semiconductor substrate at the bottom of each of said trenches to form said thick oxide films; and a step of forming insulating films on said side walls of said trench and conductive layers on said insulating films; wherein each of said capacitors comprise a respective one of said side walls of a trench of said semiconductor substrate, said insulating film and said conductive layer, and said capacitors formed on respective side walls of a trench are isolated from each other by said element isolation regions at the bottom of the trenches and are used as the capacitors of different memory cells.
Claim 16
Dependent Claim 72 words
A method of producing a semiconductor memory device according to claim 11 wherein said at least two side walls include two side walls on opposed sides of the bottom; and wherein each of the capacitors include a respective one of the two side walls on opposed sides of the bottom, so as to form two capacitors on said two side walls, which are used as the capacitors of two different memory cells.
Claim 17
Dependent Claim 42 words
A method of producing a semiconductor memory device according to claim 11 wherein the thick oxide films are formed by depositing the oxide film the thick oxide film being deposited by chemical vapor deposition, by plasma chemical vapor deposition, or by sputtering.
Claim 18
Dependent Claim 73 words
A method of producing a semiconductor memory device according to claim 11, comprising the further steps of forming a gate electrode for each said MISFET over said main surface of said substrate, in a portion of the substrate when the trenches have not been formed, and introducing an impurity of opposite conductivity type to that of the substrate, into the substrate, so as to form source and drain regions for each said MISFET.
Claim 19
Dependent Claim 27 words
A method of producing a semiconductor memory device according to claim 14 wherein said gate electrode for each said MISFET, and said conductive layers, are formed simultaneously.
Claim 20
Dependent Claim 31 words
A method of producing a semiconductor memory device according to claim 11 wherein said thick oxide films are thick silicon oxide films and are formed by depositing the silicon oxide film.
Claim 21
Dependent Claim 29 words
A method of producing a semiconductor memory device according to claim 16 wherein the silicon oxide films are deposited by chemical vapor deposition, plasma chemical vapor deposition or sputtering.

References Cited (Backward Citations)

JPS51130178A Cited
JPS5643171A Cited
US4353086A Cited
EP0088451A1 Cited
JPS58212161A Cited
JPS5992547A Cited
JPS6012752A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-04-30 1993-10-30 1994-05-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-04-30 1997-10-30 1998-05-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-04-30 2001-10-30 2002-05-01 $7700.00 Window Closed / Lapsed

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