Analog/digital converter circuit

Claim 2

An analog/digital converter circuit comprising: a capacitor having a first end, to which an analog voltage is applied, and a second end; an input buffer circuit having an input terminal, connected to the second end of said capacitor, and an output terminal; a reference voltage generating circuit for generating a plurality of reference voltages having different voltage levels; a voltage comparator circuit having a plurality of voltage comparators for comparing the output voltage of said input buffer circuit with each of the reference voltages generated by said reference voltage generating circuit, and generating a digital signal corresponding to the comparison results; a decoder circuit for decoding the output of said voltage comparator circuit; and D.C. bias voltage selection/supply means for selecting one of the reference voltages of said reference voltage generating circuit and supplying the selected reference voltage as a D.C. bias voltage to the input terminal of said input buffer circuit.

Claim 3

An analog/digital converter circuit according to claim 1, wherein said reference voltage generating circuit includes a plurality of resistors and a constant current source serially connected between a first power source voltage terminal and a second power source voltage terminal, and said plurality of reference voltages are derived from nodes between said plurality of resistors.

Claim 4

An analog/digital converter circuit according to claim 1, wherein said D.C. bias voltage selection/supply means includes: selection means for selecting one of the lowest reference voltage and the intermediate voltage from among the plurality of reference voltages generated by said reference voltage generating circuit; and a resistor element for supplying a reference voltage selected by means of said selection means to the input terminal of said input buffer circuit.

Claim 5

An analog/digital converter circuit according to claim 3, wherein said resistor element is a resistor.

Claim 6

An analog/digital converter circuit according to claim 3, wherein said resistor element is an analog switch whose conduction state is controlled by a control signal.

Claim 7

An analog/digital converter circuit according to claim 1, wherein said D.C. bias voltage selection/supply means includes: a first buffer circuit, having an output terminal and an input terminal connected to receive the lowest reference voltage from among the plurality of reference voltages generated by said reference voltage generating circuit; a second buffer circuit, having an output terminal and an input terminal connected to receive the intermediate reference voltage from among the plurality of reference voltages generated by said reference voltage generating circuit; selection means for selecting one of the output voltages of said first and second buffer circuits and supplying the selected output voltage to the input terminal of said input buffer circuit; and a resistor element for supplying a reference voltage selected by means of said selection means to the input terminal of said input buffer circuit.

Claim 8

An analog/digital converter circuit comprising: a capacitor having a first end, to which an analog voltage is applied, and a second end; an integrated circuit; a first input terminal, which is formed inside said integrated circuit and is connected to the second end of said capacitor; an input buffer circuit which is formed inside said integrated circuit and has an output terminal and an input terminal connected to said first input terminal; a reference voltage generating circuit formed inside said integrated circuit, for generating a plurality of reference voltages having different voltage levels; a voltage comparator circuit formed inside said integrated circuit and having a plurality of voltage comparators for comparing the output voltage of said input buffer circuit with each of the reference voltages generated by said reference voltage generating circuit, and generating a digital signal corresponding to the comparison results; a decoder circuit formed inside said integrated circuit, for decoding the output of said voltage comparator circuit; and first and second output terminals formed inside said integrated circuit, for deriving the lowest voltage and the intermediate voltage from among the reference voltages of said reference voltage generating circuit to the exterior of said integrated circuit; selection means formed outside said integrated circuit, for selecting one of reference voltages output from said first and second output terminals; a second input terminal, formed inside said integrated circuit, for receiving a reference voltage selected by means of said selection means; and a resistor element formed inside said integrated circuit and connected between said second input terminal and the input terminal of said input buffer circuit.

Claim 9

An analog/digital converter circuit comprising: a capacitor having a first end, to which an analog voltage is applied, and a second end; an integrated circuit; a first input terminal, which is formed inside said integrated circuit and is connected to the second end of said capacitor; an input buffer circuit which is formed inside said integrated circuit and has an output terminal and an input terminal connected to said first input terminal; a reference voltage generating circuit formed inside said integrated circuit, for generating a plurality of reference voltages having different voltage levels; a voltage comparator circuit formed inside said integrated circuit and having a plurality of voltage comparators for comparing the output voltage of said input buffer circuit with each of the reference voltages generated by said reference voltage generating circuit, and generating a digital signal corresponding to the comparison results; a decoder circuit formed inside said integrated circuit, for decoding the output of said voltage comparator circuit; and first and second output terminals formed inside said integrated circuit, for deriving the lowest voltage and the intermediate voltage from among the reference voltages of said reference voltage generating circuit to the exterior of said integrated circuit; selection means formed outside said integrated circuit, for selecting one of reference voltages output from said first and second output terminals; a second input terminal, formed inside said integrated circuit, for receiving a reference voltage selected by means of said selection means; and a resistor element formed inside said integrated circuit and connected between said second input terminal and the input terminal of said input buffer circuit.

Claim 10

An analog/digital converter circuit according to claim 7, wherein said reference voltage generating circuit includes a plurality of resistors and a constant current source serially connected between a first power source voltage terminal and a second power source voltage terminal, and said plurality of reference voltages are derived from nodes between said plurality of resistors.

Claim 11

An analog/digital converter circuit according to claim 7, wherein said resistor element is a resistor.

Claim 12

An analog/digital converter circuit according to claim 7, wherein said resistor element is an analog switch whose conduction state is controlled by a control signal.

Claim 13

An analog/digital converter circuit comprising: a capacitor having a first end, to which an analog voltage is applied, and a second end; an integrated circuit; a first input terminal which is formed inside said integrated circuit and is connected to the second end of said capacitor; an input buffer circuit which is formed inside said integrated circuit and has an output terminal and an input terminal connected to said first input terminal; a reference voltage generating circuit formed inside said integrated circuit, for generating a plurality of reference voltages having different voltage levels; a voltage comparator circuit formed inside said integrated circuit and having a plurality of voltage comparators for comparing the output voltage of said input buffer circuit with each of the reference voltages generated by said reference voltage generating circuit, and generating a digital signal corresponding to the comparison results; a decoder circuit formed inside said integrated circuit, for decoding the output of said voltage comparator circuit; a first buffer circuit, formed inside said integrated circuit and having an output terminal and an input terminal connected to receive the lowest reference voltage of the plurality of reference voltages generated by said reference voltage generating circuit; a second buffer circuit, formed inside said integrated circuit and having an output terminal and an input terminal connected to receive the intermediate reference voltage of the plurality of reference voltages generated by said reference voltage generating circuit; a first output terminal, formed inside said integrated circuit and connected to the output terminal of said first buffer circuit; a second output terminal, formed inside said integrated circuit and connected to the output terminal of said second buffer circuit; a second input terminal, formed inside said integrated circuit; a resistor element formed inside said integrated circuit and connected between said second input terminal and the input terminal of said input buffer circuit; and selection means formed outside said integrated circuit, for selecting one of reference voltages output from said first and second output terminals and supplying the selected reference voltage to said second input terminal.

Claim 14

An analog/digital converter circuit comprising: a capacitor having a first end, to which an analog voltage is applied, and a second end; an integrated circuit; a first input terminal which is formed inside said integrated circuit and is connected to the second end of said capacitor; an input buffer circuit which is formed inside said integrated circuit and has an output terminal and an input terminal connected to said first input terminal; a reference voltage generating circuit formed inside said integrated circuit, for generating a plurality of reference voltages having different voltage levels; a voltage comparator circuit formed inside said integrated circuit and having a plurality of voltage comparators for comparing the output voltage of said input buffer circuit with each of the reference voltages generated by said reference voltage generating circuit, and generating a digital signal corresponding to the comparison results; a decoder circuit formed inside said integrated circuit, for decoding the output of said voltage comparator circuit; a first buffer circuit, formed inside said integrated circuit and having an output terminal and an input terminal connected to receive the lowest reference voltage of the plurality of reference voltages generated by said reference voltage generating circuit; a second buffer circuit, formed inside said integrated circuit and having an output terminal and an input terminal connected to receive the intermediate reference voltage of the plurality of reference voltages generated by said reference voltage generating circuit; a first output terminal, formed inside said integrated circuit and connected to the output terminal of said first buffer circuit; a second output terminal, formed inside said integrated circuit and connected to the output terminal of said second buffer circuit; a second input terminal, formed inside said integrated circuit; a resistor element formed inside said integrated circuit and connected between said second input terminal and the input terminal of said input buffer circuit; and selection means formed outside said integrated circuit, for selecting one of reference voltages output from said first and second output terminals and supplying the selected reference voltage to said second input terminal.

Claim 15

An analog/digital converter circuit according to claim 11, wherein said reference voltage generating circuit includes a plurality of resistors and a constant current source serially connected between a first power source voltage terminal and a second power source voltage terminal, and said plurality of reference voltages are derived from nodes between said plurality of resistors.

Claim 16

An analog/digital converter circuit according to claim 11, wherein said resistor element is a resistor.

Claim 17

An analog/digital converter circuit according to claim 11, wherein said resistor element is an analog switch whose conduction state is controlled by a control signal.