Patent US4917443A successfully refreshed from Google Patents.
US4917443A
Expired / Lapsed
US
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Antilock brake controller with fail-safe microprocessor
Assignee: Meritor Heavy Vehicle Systems LLC
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Filing: 1989-05-01
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Granted: 1990-04-17
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Expires: 2009-05-01
Abstract
Abstract A vehicle anti-lock brake system having a main microprocessor and a fail-safe microprocessor of a different type from the main microprocessor, and a device interconnecting the main and fail-safe microprocessors and the remainder of the vehicle braking system so that the fail-safe microprocessor can disable the brake release system independently of the main microprocessor.
Inventors
- 👤 Dennis A. Kramer
- 👤 Alan E. Tousignant
- 👤 Robert S. Turner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 12:02
CPC Classifications
B; B60; B60T; B60T8/00; B60T8/32; B60T8/88; B60T8/885; Y; Y10; Y10S; Y10S303/00; Y10S303/09
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
211 words
In an anti-lock brake system for a motor vehicle, said system including means for sensing the rate of rotation of a member whose rate of rotation is indicative of the speed of a wheel of said vehicle; means for generating a wheel speed signal indicative of said rate of rotation; a main control circuit having means for determining an incipient wheel-lock condition based on said wheel speed signal and means for generating a brake release signal upon determining said incipient wheel-lock condition; and means for releasing a brake in response to said brake-force release signal, the improvement comprising: a main microprocessor; a fail-safe microprocessor of a different type; means for connecting said main microprocessor to said brake-release means such that the main microprocessor monitors whether said brake-releasing means has released said brake in response to said brake-force release signal; and means for electrically connecting said fail-safe microprocessor and main microprocessor such that the fail-safe microprocessor monitors said main microprocessor; said fail-safe microprocessor including means for preventing release of said brake by said brake-release means upon either a determination that said brake-release means is functioning improperly or a determination that said main microprocessor is functioning improperly; whereby said fail-safe microprocessor is capable of disabling said brake-release system independently of said main microprocessor.
Claim 2
Dependent Claim
211 words
In an anti-lock brake system for a motor vehicle, said system including means for sensing the rate of rotation of a member whose rate of rotation is indicative of the speed of a wheel of said vehicle; means for generating a wheel speed signal indicative of said rate of rotation; a main control circuit having means for determining an incipient wheel-lock condition based on said wheel speed signal and means for generating a brake release signal upon determining said incipient wheel-lock condition; and means for releasing a brake in response to said brake-force release signal, the improvement comprising: a main microprocessor; a fail-safe microprocessor of a different type; means for connecting said main microprocessor to said brake-release means such that the main microprocessor monitors whether said brake-releasing means has released said brake in response to said brake-force release signal; and means for electrically connecting said fail-safe microprocessor and main microprocessor such that the fail-safe microprocessor monitors said main microprocessor; said fail-safe microprocessor including means for preventing release of said brake by said brake-release means upon either a determination that said brake-release means is functioning improperly or a determination that said main microprocessor is functioning improperly; whereby said fail-safe microprocessor is capable of disabling said brake-release system independently of said main microprocessor.
Claim 3
Dependent Claim
40 words
The anti-lock brake system of claim 1, wherein said fail safe microprocessor includes a timer for monitoring the on-time of said brake-releasing means, and including means for preventing release of said brake when said on-time exceeds a predetermined on-time limit.
Claim 4
Dependent Claim
37 words
The anti-lock brake system of claim 2, wherein said fail-safe microprocessor includes means for resetting said timer by momentarily turning the timer off when said main microprocessor requires that the solenoid on-time (exceed said predetermined on-time limit.
Claim 5
Dependent Claim
29 words
The anti-lock brake system of claim 1, wherein said brake-release means includes a valve controlled by a solenoid and arranged to release the brake upon activation of the solenoid.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-16 | 1993-10-16 | 1994-04-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-16 | 1997-10-16 | 1998-04-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-16 | 2001-10-16 | 2002-04-17 | $7700.00 | Window Closed / Lapsed |