Abstract A semiconductor device comprises a semiconductor substrate of first conductivity type with a major surface having an element isolation region formed on it. It further comprises island regions formed in the major surface region of said substrate and electrically isolated by said element isolation region, source and drain regions of second conductivity type formed in at least one of said island regions and electrically isolated from each other, thereby defining a channel region between them, a first gate insulating film formed on that surface portion of said island region in which at least said channel region is formed, a first gate electrode formed on said gate insulating film, a second gate insulating film formed on said gate electrode, an active layer made of recrystallized polysilicon, formed on said second gate insulating film, and consisting of source and drain regions of the first conductivity type and a channel region of the second conductivity type sandwiched between the source and drain regions, a third gate insulating film formed on that surface portion of said active layer in which at least the channel region is formed, and a second gate electrode formed on said third gate insulating film and connected to said first gate electrode.
Inventors
👤 Moriya Nakahara
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-29 15:36
CPC Classifications
H; H10; H10D; H10D88/00
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
208 words
A three-dimensional CMOS inverter, comprising: a semiconductor substrate of a first conductivity type; source and drain regions of a second conductivity type formed in said substrate and electrically isolated from each other, thereby defining a channel region between them; a first gate oxide film formed on that surface portion of said substrate in which at least said channel region is formed; a first gate electrode comprising an impurity-doped polysilicon and formed on said first gate oxide film; a second gate oxide film formed on said first gate electrode; an active layer of recrystallized polysilicon formed on said gate oxide film and comprising source and drain regions of the first conductivity type and channel region of the second conductivity type sandwiched between the source and drain regions, wherein lengthwise axis of said channel region between said source and drain regions of the second conductivity type extends at right angles to that of the channel region sandwiched between said source and drain regions of the first conductivity type; a third gate oxide film formed on that surface portion of said active layer in which at least the channel region is formed; and a second gate electrode formed on said third gate oxide film and connected to said first gate electrode.
Claim 2
Dependent Claim
208 words
A three-dimensional CMOS inverter, comprising: a semiconductor substrate of a first conductivity type; source and drain regions of a second conductivity type formed in said substrate and electrically isolated from each other, thereby defining a channel region between them; a first gate oxide film formed on that surface portion of said substrate in which at least said channel region is formed; a first gate electrode comprising an impurity-doped polysilicon and formed on said first gate oxide film; a second gate oxide film formed on said first gate electrode; an active layer of recrystallized polysilicon formed on said gate oxide film and comprising source and drain regions of the first conductivity type and channel region of the second conductivity type sandwiched between the source and drain regions, wherein lengthwise axis of said channel region between said source and drain regions of the second conductivity type extends at right angles to that of the channel region sandwiched between said source and drain regions of the first conductivity type; a third gate oxide film formed on that surface portion of said active layer in which at least the channel region is formed; and a second gate electrode formed on said third gate oxide film and connected to said first gate electrode.