Multiplexing arrangement for a digital transmission system

Claim 2

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames, respectively from first and second tributary lines, each frame including tributary line identification information and plural sequential blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line means including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for interleaving the blocks of digital bit streams from the first and second tributary line means into a multiplexed bit stream.

Claim 3

A digital block multiplexer in accordance with claim 1 further comprising means responsive to a phase modulated line signal from the first tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 4

A digital block multiplexer in accordance with claim 1 further comprising means responsive to a phase modulated line signal from the second tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 5

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames, each frame including tributary line identification information and plural sequential blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the parity bits containing control information, means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream without service bits between the blocks, and means responsive to the parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit streams in continuous streams of frames for first and second reveiving tributary lines.

Claim 6

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames, each frame including tributary line identification information and plural sequential blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the parity bits containing control information, means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream without service bits between the blocks, and means responsive to the parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit streams in continuous streams of frames for first and second reveiving tributary lines.

Claim 7

A digital block demultiplexer for separating blocks of bits from a block multiplexed bit stream, the demultiplexer comprising means for receiving the multiplexed bit stream including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural sequential blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including in a periodic one of the parity bit positions, a complemented parity bit containing control information; and means for separating the blocks of digital bit streams from the first and second tributary lines into separate continuous tributary line signals including blocks with parity bits annd complemented parity bits containing control information.

Claim 8

A digital block demultiplexer for separating blocks of bits from a block multiplexed bit stream, the demultiplexer comprising means for receiving the multiplexed bit stream including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural sequential blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including in a periodic one of the parity bit positions, a complemented parity bit containing control information; and means for separating the blocks of digital bit streams from the first and second tributary lines into separate continuous tributary line signals including blocks with parity bits annd complemented parity bits containing control information.

Claim 9

A digital block demultiplexer in accordance with claim 5 further comprising means responsive to a phase modulated signal on the multiplexed bit stream for impressing phase modulation on the sequences of blocks of digital bit streams in frames for the separate tributary line signals.

Claim 10

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line means including in a periodic one of the block parity bit positions, a complemented block parity bit containg control information; and means fcr interleaving the blocks of digital bit streams from the first and second tributary line means into a multiplexed bit stream on a repeatered line wher the block parity bits and the complemented block parity bits continuing control information are used for their intended purposes.

Claim 11

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line means including in a periodic one of the block parity bit positions, a complemented block parity bit containg control information; and means fcr interleaving the blocks of digital bit streams from the first and second tributary line means into a multiplexed bit stream on a repeatered line wher the block parity bits and the complemented block parity bits continuing control information are used for their intended purposes.

Claim 12

A digital block multiplexer in accordance with claim 7 further comprising means responsive to a phase modulated line signal from the first tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 13

A digital block multiplexer in accordance with claim 7 further comprising means responsive to a phase modulated line signal from the second tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 14

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the block parity bits complemented by control information; means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream on a repeatered line where the block party bits and the block parity bits complemented by control information are used for their intended purposes and means responsive to the block parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit streams in frames for first and second receiving tributary lines.

Claim 15

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the block parity bits complemented by control information; means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream on a repeatered line where the block party bits and the block parity bits complemented by control information are used for their intended purposes and means responsive to the block parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit streams in frames for first and second receiving tributary lines.

Claim 16

A digital block demultiplexer for separating blocks of bits from a multiplexed bit stream, the demultiplexer comprising means for receiving from a repeatered line the multiplexed bit stream including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information, the block parity bits and the complemented block parity bit containing control information are used for their intended purposes; and means for separating the blocks of digital bit streams from the first and second tributary lines into separate tributary line signals including block parity bits and complemented block parity bits containing control information used for their intended purposes.

Claim 17

A digital block demultiplexer for separating blocks of bits from a multiplexed bit stream, the demultiplexer comprising means for receiving from a repeatered line the multiplexed bit stream including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information, the block parity bits and the complemented block parity bit containing control information are used for their intended purposes; and means for separating the blocks of digital bit streams from the first and second tributary lines into separate tributary line signals including block parity bits and complemented block parity bits containing control information used for their intended purposes.

Claim 18

A digital block demultiplexer in accordance with claim 11 further comprising means responsive to a phase modulated signal on the multiplexed bit stream for impressing phase modulation on the sequences of blocks of digital bit streams in frames for the separate tributary line signals.

Claim 19

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames at a bit rate of X bits per second, respectively from first and second tibutary lines, each frame including tributary line identification infromation and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary lines including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream at a bit rate of nX bits per second, where X is a number and n equals the number of tributary lines.

Claim 20

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames at a bit rate of X bits per second, respectively from first and second tibutary lines, each frame including tributary line identification infromation and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary lines including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream at a bit rate of nX bits per second, where X is a number and n equals the number of tributary lines.

Claim 21

A digital block multiplexer in accordance with claim 13 further comprising means responsive to a phase modulated line signal from the first tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 22

A digital block multiplexer in accordance with claim 13 further comprising means responsive to a phase modulated line signal from the second tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 23

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames at a bit rate of X bits per second, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the block parity bits complemented by control information, means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream at a bit rate of nX bits per second, and means responsive to the block parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit streams in frames at a bit rate of X bits per second for first and second receiving tributary lines, where X is a number and n equals the number of tributary lines.

Claim 24

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames at a bit rate of X bits per second, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the block parity bits complemented by control information, means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream at a bit rate of nX bits per second, and means responsive to the block parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit streams in frames at a bit rate of X bits per second for first and second receiving tributary lines, where X is a number and n equals the number of tributary lines.

Claim 25

A digital block demultiplexer for separating blocks of bits from a multiplesed bit stream, the demultiplexer comprising means for receiving the multiplexed bit stream at a bit rate of nX bits per second including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for separating the blocks of digital bit streams from the first and second tributary line means into separate tributary line signals at a bit rate of X bits per second including block parity bits and complemented block parity bits containing control information, where X is a number and n equals the number of tributary lines.

Claim 26

A digital block demultiplexer for separating blocks of bits from a multiplesed bit stream, the demultiplexer comprising means for receiving the multiplexed bit stream at a bit rate of nX bits per second including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for separating the blocks of digital bit streams from the first and second tributary line means into separate tributary line signals at a bit rate of X bits per second including block parity bits and complemented block parity bits containing control information, where X is a number and n equals the number of tributary lines.

Claim 27

A digital block demultiplexer in accordance with claim 17 further comprising means responsive to a phase modulated signal on the multiplexed bit stream for impressing phase modulation on the sequences of blocks of digital bit streams in frames for the separate tributary line signals.

Claim 28

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames at a bit rate of X bits per second, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits sequentially, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line means including in a periodic one of the parity bit positions, a complemented block parity bit containing control information; and means for interleaving the blocks of digital bit streams from the first and second tributary line means into a multiplexed bit stream on a repeatered line without service bits between blocks at a bit rate of nX bits per second, where X is a number, n equals the number of tributaries, and the block parity bits and the complemented block parity bits containing control information are useful along the repeatered line.

Claim 29

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames at a bit rate of X bits per second, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits sequentially, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line means including in a periodic one of the parity bit positions, a complemented block parity bit containing control information; and means for interleaving the blocks of digital bit streams from the first and second tributary line means into a multiplexed bit stream on a repeatered line without service bits between blocks at a bit rate of nX bits per second, where X is a number, n equals the number of tributaries, and the block parity bits and the complemented block parity bits containing control information are useful along the repeatered line.

Claim 30

A digital block multiplexer in accordance with claim 19 further comprising means responsive to a phase modulated line signal from the first tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 31

A digital block multiplexer in accordance with claim 19 further comprising means responsive to a phase modulated line signal from the second tributary line for impressing phase modulation on the multiplexed bit stream.

Claim 32

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames at a bit rate of X bits per second, each frame including tributary line indentification information and plural blocks of digital bits sequentially, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the parity bits complemented by control information, means for interleaving the blocks of digital bits streams from the first and second tributary lines into a multiplexed bit stream without service bits on a repeatered line at a bit rate of nX bits per second, and means responsive to the block parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit strams in frames at a bit rate of X bits per second for first and second receiving tributary lines, where X is a number, n equals the number of tributaries, and the block parity bits and parity bits complemented by control information are useful.

Claim 33

A digital transmission system for interleaving blocks of bits from each of a plurality of input tributary lines, the system comprising first and second transmitting tributary line means, each for producing a sequence of blocks of digital bit streams in frames at a bit rate of X bits per second, each frame including tributary line indentification information and plural blocks of digital bits sequentially, each block of digital bits including plural data bits and a block parity bit, the stream of blocks of digital bit streams from the second tributary line means including a periodic one of the parity bits complemented by control information, means for interleaving the blocks of digital bits streams from the first and second tributary lines into a multiplexed bit stream without service bits on a repeatered line at a bit rate of nX bits per second, and means responsive to the block parity bits and the tributary line identification information in the multiplexed bit stream for demultiplexing the blocks of the digital bit streams into identified sequences of blocks of digital bit strams in frames at a bit rate of X bits per second for first and second receiving tributary lines, where X is a number, n equals the number of tributaries, and the block parity bits and parity bits complemented by control information are useful.

Claim 34

A digital block demultiplexer for separating blocks of bits from a multiplexed bit stream, the demultiplexer comprising means for receiving the multiplexed bit stream at a bit rate of nX bits per second including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural sequential blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks in the multiplexed bit stream from the second tributary line including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for separating the blocks of digital bit streams from the first and second tributary lines into separate tributary line signals at a bit rate of X bits per second including blocks with the block parity bits and the complemented block parity bits containing control information, where X is a number and n equals the number of tributary lines.

Claim 35

A digital block demultiplexer for separating blocks of bits from a multiplexed bit stream, the demultiplexer comprising means for receiving the multiplexed bit stream at a bit rate of nX bits per second including interleaved blocks of digital bit streams in frames from first and second tributary lines, each frame including tributary line identification information and plural sequential blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks in the multiplexed bit stream from the second tributary line including in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for separating the blocks of digital bit streams from the first and second tributary lines into separate tributary line signals at a bit rate of X bits per second including blocks with the block parity bits and the complemented block parity bits containing control information, where X is a number and n equals the number of tributary lines.

Claim 36

A digital block demultiplexer in accordance with claim 23 further comprising means responsive to a phase modulated signal on the multiplexed bit stream for impressing phase modulation on the sequences of blocks of digital bit streams in frames for the separate tributary line signals.

Claim 37

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames at a bit rate of X bits per second, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including, in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream at a rate of nX bits per second without service bits between blocks in the multiplexed bit streams, where X is a number and n equals the number of tributary lines.

Claim 38

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames at a bit rate of X bits per second, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including, in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; and means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream at a rate of nX bits per second without service bits between blocks in the multiplexed bit streams, where X is a number and n equals the number of tributary lines.

Claim 39

A digital block multiplexer for interleaving blocks of bits from a plurality of input tributary lines, in accordance with claim 25, wherein the blocks of digital bits at the rate of X bits per second from each tributary line occupy the entire duration of each frame in the tributary line bit stream; and the blocks of digital bits at the rate of nX bits per second in the multiplexed bit stream occupy the entire duration of each frame in the multiplexed bit stream.

Claim 40

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including, in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream on a repeatered line, wherein the block parity bits are positioned to provide an indication of block parity errors without reframing the bit stream and the complemented block parity bits containing control information control equipment along the repeatered line.

Claim 41

A digital block multiplexer for interleaving blocks of bits from each of a plurality of input tributary lines, the multiplexer comprising means for receiving sequences of blocks of digital bit streams in frames, respectively from first and second tributary lines, each frame including tributary line identification information and plural blocks of digital bits, each block of digital bits including plural data bits and a block parity bit, the sequence of blocks from the second tributary line including, in a periodic one of the block parity bit positions, a complemented block parity bit containing control information; means for interleaving the blocks of digital bit streams from the first and second tributary lines into a multiplexed bit stream on a repeatered line, wherein the block parity bits are positioned to provide an indication of block parity errors without reframing the bit stream and the complemented block parity bits containing control information control equipment along the repeatered line.

Claim 44

A method for multiplexing blocks of data bits, in accordance with claim 28, comprising the further step of: impressing phase modulation on the multiplexed bit stream from a phase modulated line signal on the first tributary line.

Claim 45

A method for multiplexing blocks of data bits, in accordance with claim 28, comprising the further step of: impressing phase modulation on the multiplexed bit stream from a phase modulated line signal on the second tributary line.

Claim 48

A method for demultiplexing blocks of data bits from a block multiplexed bit stream, in accordance with claim 31, comprising the further step of: impressing phase modulation on the separate continuous line signals from a phase modulated signal on the multiplexed bit stream.