Patent US4914601A successfully refreshed from Google Patents.
US4914601A
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Method for profiling wafers and for locating dies thereon
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1988-02-25
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Granted: 1990-04-03
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Expires: 2008-02-25
Abstract
Abstract A new and improved method for profiling wafers, and for uniquely identifying the dies formed thereon, wherein the method includes the step of locating a set of reference points along the periphery of the wafer, relative to a predetermined coordinate system. Next, the equation of a hypothetical circle which substantially contours the periphery of the wafer, and which passes through the reference points, is defined. The coordinates of the center of the hypothetical circle, as well as the coordinates of an arbitrary reference die on the wafer, are then derived from the equation of the hypothetical circle. Subsequently, the entire surface of the wafer is mapped relative to the center or to the reference die, by utilizing predetermined stepping dimensions.
Inventors
- 👤 John B. Smyth, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 07:40
CPC Classifications
G; G01; G01B; G01B21/00; G01B21/02; G01B21/04; H; H10; H10P; H10P95/00; G01R; G01R31/00; G01R31/28; G01R31/316
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
113 words
A method for profiling the surface of a wafer having a plurality of dies formed thereon, comprising the steps of: (a) locating a set of at least two reference points along the periphery of the wafer, relative to a predetermined coordinate system; (b) determining the coordinates of said reference points; (c) defining the equation of the periphery of the wafer passing through the coordinates of said reference points; (d) locating the coordinates of an arbitrary target die on the wafer, relative to said equation of the wafer; and (e) mapping the entire wafer surface with a die grid based on the physical placement and dimensions of the wafer, by utilizing predetermined stepping dimensions.
Claim 2
Independent Claim
113 words
A method for profiling the surface of a wafer having a plurality of dies formed thereon, comprising the steps of: (a) locating a set of at least two reference points along the periphery of the wafer, relative to a predetermined coordinate system; (b) determining the coordinates of said reference points; (c) defining the equation of the periphery of the wafer passing through the coordinates of said reference points; (d) locating the coordinates of an arbitrary target die on the wafer, relative to said equation of the wafer; and (e) mapping the entire wafer surface with a die grid based on the physical placement and dimensions of the wafer, by utilizing predetermined stepping dimensions.
Claim 3
Dependent Claim
45 words
The method as defined in claim 1, wherein the wafer has a substantially circular periphery, and wherein said step of defining the equation of the periphery includes the step of defining the equation of a hypothetical circle which substantially contours the periphery of the wafer.
Claim 4
Dependent Claim
24 words
The method as defined in claim 2, wherein said step of locating includes the step of determining the coordinates of two reference peripheral points.
Claim 5
Dependent Claim
26 words
The method as defined in claim 3, further including the step of determining the coordinates of the center of the substantially circular periphery of the wafer.
Claim 6
Dependent Claim
27 words
The method as defined in claim 4, wherein the step of computing the coordinates of the target die includes the step of utilizing the predetermined stepping dimensions.
Claim 7
Dependent Claim
27 words
The method as defined in claim 5, further including the step of determining the coordinates of a third peripheral point for computing the radius of the wafer.
Claim 8
Dependent Claim
16 words
The method as defined in claim 4, further including the step of excluding preselected peripheral dies.
Claim 9
Dependent Claim
29 words
The method as defined in claim 5, wherein the wafer includes at least one major flat, and wherein said peripheral reference points are not located on said major flat.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-02 | 1993-10-02 | 1994-04-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-02 | 1997-10-02 | 1998-04-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-02 | 2001-10-02 | 2002-04-03 | $7700.00 | Window Closed / Lapsed |