US4912346A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Input/output circuit for IC card
Assignee: Mitsubishi Electric Corp
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Filing: 1989-02-02
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Granted: 1990-03-27
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Expires: 2009-02-02
Abstract
Abstract An input/output IC gate circuit inserted in the input or output lines of an IC memory card contains at least one input stage, for one of the input or output lines, in which a first MOSFET, a second MOSFET and a third MOSFET are connected in series between an external power source line and a grounding line. The first MOSFET is in an ON state when the voltage of the input or output line is in the vicinity of that of a power source and in an OFF state when the voltage is at 0 V. The second MOSFET is in an OFF state when the voltage of the input or output line is in the vicinity of the power source and in an ON state when the voltage is at 0 V. The third MOSFET is on/off controlled by a control signal delivered from a level detection circuit. The third MOSFET is turned on when the voltage of the external power source line exceeds a predetermined value which is one-half the voltage of the data backup battery or above.
Inventors
- 👤 Masaharu Mizuta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 21:45
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/0008; H03K19/0013
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
261 words
An input/output circuit for an IC memory card which incorporates a data backup battery and in which a memory chip portion is connected to an external power source line and a grounding line and between the terminals of said data backup battery comprising: a voltage level detection circuit for detecting the level of a voltage of an external power source line and for generating a control signal when the voltage exceeds a predetermined voltage value which is one-half the voltage of a data backup battery, and an IC gate circuit for insertion in input and output lines of said IC memory card and including at least one input stage for one of the input or output lines in which a first MOSFET, a second MOSFET, and a third MOSFET are connected in series between the external power source line and the grounding line, said first MOSFET being in an ON state when the voltage of said input or output line is approximately equal to the voltage of the external power source and in an OFF state when the voltage is zero, said second MOSFET being in an OFF state when the voltage of said input or output line is approximately equal to the voltage of the external power source and in an ON state when the voltage is zero, the on/off state of said third MOSFET being controlled by the control signal produced by said level detecting circuit, wherein said third MOSFET is placed in an ON state when the voltage of said exernal power line exceeds the predetermined voltage value.
Claim 2
Dependent Claim
261 words
An input/output circuit for an IC memory card which incorporates a data backup battery and in which a memory chip portion is connected to an external power source line and a grounding line and between the terminals of said data backup battery comprising: a voltage level detection circuit for detecting the level of a voltage of an external power source line and for generating a control signal when the voltage exceeds a predetermined voltage value which is one-half the voltage of a data backup battery, and an IC gate circuit for insertion in input and output lines of said IC memory card and including at least one input stage for one of the input or output lines in which a first MOSFET, a second MOSFET, and a third MOSFET are connected in series between the external power source line and the grounding line, said first MOSFET being in an ON state when the voltage of said input or output line is approximately equal to the voltage of the external power source and in an OFF state when the voltage is zero, said second MOSFET being in an OFF state when the voltage of said input or output line is approximately equal to the voltage of the external power source and in an ON state when the voltage is zero, the on/off state of said third MOSFET being controlled by the control signal produced by said level detecting circuit, wherein said third MOSFET is placed in an ON state when the voltage of said exernal power line exceeds the predetermined voltage value.
Claim 3
Dependent Claim
35 words
An input/output circuit for an IC memory card according to claim 1 wherein said first MOSFET is a p-channel MOSFET, said second MOSFET is an n-channel MOSFET, and said third MOSFET is a p-channel MOSFET.
Claim 4
Dependent Claim
35 words
An input/output circuit for an IC memory card according to claim 1 wherein said first MOSFET is a p-channel MOSFET, said second MOSFET is an n-channel MOSFET, and said third MOSFET is an n-channel MOSFET.
Claim 5
Dependent Claim
27 words
An input/output circuit for an IC memory card according to claim 1 wherein said input or output line of said IC memory is a lower address bus.
Claim 6
Dependent Claim
46 words
An input/output circuit for an IC memory card according to claim 1 wherein the voltage of said data backup battery is 3 V, and said third MOSFET is placed in an ON state when the voltage of said external power source line exceeds about 4.4 V.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-26 | 1993-09-25 | 1994-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-26 | 1997-09-25 | 1998-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-26 | 2001-09-25 | 2002-03-27 | $7700.00 | Window Closed / Lapsed |