US4912065A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Plasma doping method
Assignee: Panasonic Holdings Corp
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Filing: 1988-05-26
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Granted: 1990-03-27
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Expires: 2008-05-26
Abstract
Abstract Disclosed is a plasma doping method capable of introducing a large quantity of impurities into a substrate at a relatively low temperature (200° to 600° C.). In the LSI fabrication process represented by Si process, it is necessary to introduce impurities at a properly controlled concentration into desired positions. In this plasma doping method, in order to satisfy this application, the doping temperature may be controlled around 100° C. at high degree of vacuum and by ECR discharge or the like, and a process capable of using a resist mask generally used in the LSI fabrication step and controlling the concentration in a wide range is enabled, so that an extremely shallow impurity profile is realized.
Inventors
- 👤 Bunji Mizuno
- 👤 Masafumi Kubota
- 👤 Ichiro Nakayama
- 👤 Masuo Tanno
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 09:01
CPC Classifications
H; H10; H10P; H10P32/00; H10P32/10; H10P32/12; H10P32/1204
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
162 words
A process of plasma doping a substrate comprising the steps of: (a) providing an apparatus possessing a mechanism capable of applying microwave and magnetic field satisfying the electron cyclotron resonance condition, in a vacuum chamber; (b) placing a substrate coated by a resist having an opening on a sample table disposed in said vacuum chamber; (c) generating plasma by introducing a gas containing a specific element into said vacuum chamber, said plasma being generated in said vacuum chamber at a vacuum higher than 5×10 -3 Torr; (d) generating a discharge between said vacuum chamber and said substrate by applying high frequency or direct-current electric power to said sample table; and (e) doping said substrate with an impurity containing said specific element in said plasma, with said resist being left over on said substrate, by making use of the potential difference produced between said substrate and said plasma, and wherein said substrate and said sample table are cooled during the plasma doping process.
Claim 2
Dependent Claim
162 words
A process of plasma doping a substrate comprising the steps of: (a) providing an apparatus possessing a mechanism capable of applying microwave and magnetic field satisfying the electron cyclotron resonance condition, in a vacuum chamber; (b) placing a substrate coated by a resist having an opening on a sample table disposed in said vacuum chamber; (c) generating plasma by introducing a gas containing a specific element into said vacuum chamber, said plasma being generated in said vacuum chamber at a vacuum higher than 5×10 -3 Torr; (d) generating a discharge between said vacuum chamber and said substrate by applying high frequency or direct-current electric power to said sample table; and (e) doping said substrate with an impurity containing said specific element in said plasma, with said resist being left over on said substrate, by making use of the potential difference produced between said substrate and said plasma, and wherein said substrate and said sample table are cooled during the plasma doping process.
Claim 3
Dependent Claim
23 words
A process of plasma doping a substrate according to claim 1, wherein a semiconductor substrate is used as the substrate to be doped.
Claim 4
Dependent Claim
22 words
A process of plasma doping substrate according to claim 2, wherein a silicon substrate is used as the substrate to be doped.
Claim 5
Dependent Claim
50 words
A process of plasma doping a substrate according to claim 1, wherein a semiconductor substrate is used as the substrate to be doped, and a substrate containing a structure composed of an insulation film formed on this semiconductor substrate and a semiconductor thin film on said insulating film is used.
Claim 6
Dependent Claim
67 words
A process of plasma doping a substrate according to claim 4, wherein silicon is used as the semiconductor substrate to be doped, a gate insulation film is formed on this silicon substrate, and the silicon substrate containing a structure having a gate electrode film deposited on said insulation film, and part of plural positions of said silicon substrate opened in the vicinity of said structure is used.
References Cited (Backward Citations)
US3880675A
Cited
US4434036A
Cited
US4465529A
Cited
US4382099A
Cited
US4737379A
Cited
JPS6146044A
Cited
US4668365A
Cited
US4698104A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-26 | 1993-09-25 | 1994-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-26 | 1997-09-25 | 1998-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-26 | 2001-09-25 | 2002-03-27 | $7700.00 | Window Closed / Lapsed |