Binary tree multiprocessor

Claim 1

A binary tree multiprocessing machine comprising: an array of plural identical signal processing and communicating elements connected to a host through a root element, said elements arranged in a sequence of tree levels extending between said root element, through at least one multiple element intermediate level, to a multiple element leaf level, said elements comprising means for matching unknown digital signal pattern data to reference digital signal pattern data by executing a process substantially identically performed in each element and consisting of Broadcast, Sliced Procedure, Resolve, and Report functions, means acting through said root element, for effecting input/output communication and data signal coupling for the entire array, each element comprising: an input/output processing facility and a memory for storing said reference digital signal pattern, and a hardware, pipelined multiply/accumulate processor and an execution processor in each said element, means for selectively coupling command signals from said Host received through said input/output processing facility during said Sliced Procedure function, to said pipelined processor and to said execution processor, for mathematically correlating unknown input digital signal pattern data with said reference digital signal pattern data stored in each said element, said pipelined processor executing floating point multiplication and floating point addition operations in a single multiply/accumulate instruction execution, on said unknown data and said reference data thereby performing two floating point operations in execution of a single instruction.