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US4910471A Expired / Lapsed US ⏱️ 0.0 years remaining

CMOS ring oscillator having frequency independent of supply voltage

Assignee: ICT INTERNATIONAL CMOS TECHNOLOGY Inc A CORP OF
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Filing: 1989-02-15
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Granted: 1990-03-20
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Expires: 2009-02-15
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Abstract

Abstract A CMOS ring oscillator includes an odd number of serially connected inverter stages with each stage comprising a CMOS transistor pair. The output of each stage is taken at the common terminal of the CMOS transistor pair with capacitive means shunting the output of each stage to circuit ground. The input of each stage is applied at the gate of the p-channel transistor. A fixed reference voltage, V REF , is applied to the gate of each n-channel transistor, whereby the discharge of voltage on the capacitive means through the n-channel transistor is independent of supply voltage.

Inventors

  • 👤 Dhaval J. Brahmbhatt
  • 👤 Mehrdad Mofidi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 05:24
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/027; H03K3/03; H03K3/0315; H03K3/353; H03K3/354

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 112 words
A ring oscillator comprising an odd number of serially connected inverter stages, each stage including a p-channel transistor serially connected with an n-channel transistor between a first voltage potential (V CC ) and a second voltage potential (ground) and with the common terminal of the serially connected transistor being an output, means connecting the output of one stage with the gate terminal of the p-channel transistor in the succeeding stage, capacitive means connected to each output, a reference voltage (V REF ) connected to the gate of each n-channel transistor whereby the discharge of the capacitor means of a preceding stage is relatively independent of the first voltage potential (V CC ).
Claim 2
Dependent Claim 112 words
A ring oscillator comprising an odd number of serially connected inverter stages, each stage including a p-channel transistor serially connected with an n-channel transistor between a first voltage potential (V CC ) and a second voltage potential (ground) and with the common terminal of the serially connected transistor being an output, means connecting the output of one stage with the gate terminal of the p-channel transistor in the succeeding stage, capacitive means connected to each output, a reference voltage (V REF ) connected to the gate of each n-channel transistor whereby the discharge of the capacitor means of a preceding stage is relatively independent of the first voltage potential (V CC ).
Claim 3
Dependent Claim 24 words
The ring oscillator as defined by claim 1 wherein said capacitive means comprises a capacitor connected between each output and the second voltage potential.
Claim 4
Dependent Claim 21 words
The ring oscillator as defined by claim 1 wherein said capacitive means comprises the gate structure of the succeeding p-channel transistor.
Claim 5
Dependent Claim 26 words
The ring oscillator as defined by claim 1 wherein the width-to-length ratio of each p-channel transistor is greater than the width-to-length ratio of each n-channel transistor.
Claim 6
Dependent Claim 46 words
The ring oscillator as defined by claim 4 wherein the channel of each p-channel transistor has a width of 80 microns and a length of 5 microns, and the channel of each n-channel transistor has a width of 6 microns and a length of 6 microns.
Claim 7
Dependent Claim 37 words
The ring oscillator as defined by claim 5 wherein the gate oxide for the n-channel transistors and p-channel transistors is on the order of 350 A and the capacitor plate dimensions are 20 microns by 20 microns.
Claim 8
Dependent Claim 30 words
The ring oscillator as defined by claim 1 wherein said reference voltage is between a minimum value of said first voltage potential and the threshold voltage of said n-channel transistors.

References Cited (Backward Citations)

US4015219A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-03-19 1993-09-18 1994-03-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-03-19 1997-09-18 1998-03-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-03-19 2001-09-18 2002-03-20 $7700.00 Window Closed / Lapsed

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