Patent US4910157A successfully refreshed from Google Patents.
US4910157A
Expired / Lapsed
US
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Method of producing recessed gate of MESFET in compound semiconductor
Assignee: Fujitsu Ltd
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Filing: 1989-08-23
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Granted: 1990-03-20
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Expires: 2009-08-23
Abstract
Abstract A method of producing a compound semiconductor device comprises the steps of: forming a recess portion on a compound semiconductor substrate; forming an ion penetrating mask on the recess portion in such a manner that the surfaces of the compound semiconductor substrate and the ion penetrating mask are level; forming an active layer having a substantially uniform depth is the compound semiconductor by implanting impurity ions into the entire exposed surface and, removing the ion penetrating mask and forming a gate electrode at the recess portion.
Inventors
- 👤 Yuuichi Hasegawa
- 👤 Hidetake Suzuki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 18:55
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/061; H10D30/0612; H10D30/0614; H10P; H10P30/00; H10P30/20; H10P30/22; H10P50/00; H10P50/73; Y; Y10; Y10S; Y10S438/00; Y10S438/942
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
85 words
A method of producing a compound semiconductor device comprising the steps of: forming a recess portion on a compound semiconductor substrate; forming an ion penetrating mask on the recess portion in such a manner that the surfaces of the compound semiconductor substrate and the ion penetrating mask are level; forming an active layer having a substantially uniform depth in the compound semiconductor by implanting impurity loss to the exposed surfaces; and removing said ion penetrating mask and forming a gate electrode at said recess portion.
Claim 2
Independent Claim
85 words
A method of producing a compound semiconductor device comprising the steps of: forming a recess portion on a compound semiconductor substrate; forming an ion penetrating mask on the recess portion in such a manner that the surfaces of the compound semiconductor substrate and the ion penetrating mask are level; forming an active layer having a substantially uniform depth in the compound semiconductor by implanting impurity loss to the exposed surfaces; and removing said ion penetrating mask and forming a gate electrode at said recess portion.
Claim 3
Dependent Claim
21 words
A method according to claim 1, wherein said compound semiconductor is selected from the group consisting of gallium arsenide and InP.
Claim 4
Dependent Claim
22 words
A method according to claim 1, wherein said ion penetrating mask has substantially the same ion permeability as said compound semiconductor substrate.
Claim 5
Dependent Claim
23 words
A method according to claim 3, wherein said ion penetrating mask is selected from the group consisting of silicon nitride and silicon dioxide.
Claim 6
Dependent Claim
27 words
A method according to claim 1, wherein the width and the depth of said recess portion are 1 to 2 μm and 0.1 to 0.2 μm, respectively.
Claim 7
Dependent Claim
23 words
A method according to claim 5, wherein the width and the depth of said recess portion are 1.5 μm and 0.15 μm, respectively.
Claim 8
Dependent Claim
24 words
A method according to claim 1, wherein said impurity ions are selected from the group consisting of Si ions, S ions and Se ions.
Claim 9
Dependent Claim
23 words
A method according to claim 1, wherein said compound semiconductor device is selected from the group consisting of GaAs MESFET and InP MESFET.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-19 | 1993-09-18 | 1994-03-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-19 | 1997-09-18 | 1998-03-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-19 | 2001-09-18 | 2002-03-20 | $7700.00 | Window Closed / Lapsed |