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US4908857A Expired / Lapsed US ⏱️ 0.0 years remaining

Isolated drive circuit

Assignee: Siemens Transmission Systems Inc
•
Filing: 1989-05-22
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Granted: 1990-03-13
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Expires: 2009-05-22
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Abstract

Abstract The present invention provides a power drive circuit which is transformer isolated from the circuit developing the drive signals, but which does not lose its DC reference voltage. This technique results in the desired isolation without the undesirable possibility of operating the output transistors in an unsafe DC region, which is a particular problem when the output transistors are FET devices. In accordance with the present invention, pulse transformers are used to drive the power FET devices.

Inventors

  • 👤 Robert V. Burns
  • 👤 Sanjay Gupta

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 20:25
CPC Classifications
H; H04; H04M; H04M19/00; H04M19/02; H04M19/023; H02; H02M; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/33569; H02M3/33573

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 111 words
An isolated drive circuit for a power amplifier, comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means.
Claim 2
Dependent Claim 111 words
An isolated drive circuit for a power amplifier, comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means.
Claim 3
Dependent Claim 75 words
An isolated drive circuit in accordance with claim 1 wherein said dc restoration circuit means includes: capacitor means to block dc offset voltage; a pair of zener diodes to conduct and clamp positive and negative pulses respectively; and further resistance means in series with said zener diodes to limit the current flowing through said zener diodes; whereby said PWM input signals are restored to their original form at the output of said dc restoration circuit.
Claim 4
Dependent Claim 22 words
An isolated drive circuit in accordance with claim 1 wherein said power FET switching amplifier means comprises a pair of FET devices.
Claim 5
Dependent Claim 40 words
An isolated drive circuit in accordance with claim 3 wherein said resistance means prevents the gates of said FET devices from floating under the condition of no pulse train being applied to the primary winding of said input transformer means.
Claim 6
Dependent Claim 134 words
In a ringing generator for telecommunications transmission equipment, having a power amplifier stage wherein low voltage PWM pulses at a digital logic level are converted to high voltage pulses, the improvement comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means.
Claim 7
Dependent Claim 134 words
In a ringing generator for telecommunications transmission equipment, having a power amplifier stage wherein low voltage PWM pulses at a digital logic level are converted to high voltage pulses, the improvement comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means.
Claim 8
Dependent Claim 130 words
In a power supply having a power amplifier stage wherein low voltage PWM pulses at a digital logic level are converted to high voltage pulses, the improvement comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means.
Claim 9
Dependent Claim 130 words
In a power supply having a power amplifier stage wherein low voltage PWM pulses at a digital logic level are converted to high voltage pulses, the improvement comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means.
Claim 10
Dependent Claim 173 words
A pulse width modulated power supply, comprising: A pair of isolated drive circuits, each of said drive circuits including: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input transformer means; output transformer means having the outputs of said pair of isolated drive circuits coupled to the primary winding thereof as a bipolar waveform, and having an output; synchronous rectifier means for reforming the output of said output transformer means into a bipolar signal; and low pass filter means for filtering said bipolar signal.
Claim 11
Dependent Claim 173 words
A pulse width modulated power supply, comprising: A pair of isolated drive circuits, each of said drive circuits including: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input transformer means; output transformer means having the outputs of said pair of isolated drive circuits coupled to the primary winding thereof as a bipolar waveform, and having an output; synchronous rectifier means for reforming the output of said output transformer means into a bipolar signal; and low pass filter means for filtering said bipolar signal.
Claim 12
Dependent Claim 192 words
In a ringing generator for telecommunications transmission equipment, having a power amplifier stage including a pair of isolated circuits wherein low voltage PWM pulses at a digital logic level are converted to high voltage pulses, the improvement comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means; output transformer means having outputs of said pair of isolated drive circuits coupled to the primary winding thereof as a bipolar waveform, and having an output; synchronous rectifier means for reforming the output of said output transformer means into a bipolar signal; and low pass filter means for filtering said bipolar signal.
Claim 13
Dependent Claim 192 words
In a ringing generator for telecommunications transmission equipment, having a power amplifier stage including a pair of isolated circuits wherein low voltage PWM pulses at a digital logic level are converted to high voltage pulses, the improvement comprising: input pulse transformer means having PWM input signals with a dc offset voltage capacitively coupled to primary windings thereof; dc restoration circuit means coupled to a secondary winding of said input transformer means, and having an output; power FET switching amplifier means for increasing the voltage level of the output of said dc restoration circuit means to a higher voltage level; and resistance means coupled between the gates and sources of said power FET switching amplifier means to prevent the power FET switching amplifier means from conducting when said input PWM pulse train is not present at said input pulse transformer means; output transformer means having outputs of said pair of isolated drive circuits coupled to the primary winding thereof as a bipolar waveform, and having an output; synchronous rectifier means for reforming the output of said output transformer means into a bipolar signal; and low pass filter means for filtering said bipolar signal.
Claim 14
Dependent Claim 75 words
An isolated drive circuit in accordance with claim 8 wherein said dc restoration circuit means includes: capacitor means to block dc offset voltage; a pair of zener diodes to conduct and clamp positive and negative pulses respectively; and further resistance means in series with said zener diodes to limit the current flowing through said zener diodes; whereby said PWM input signals are restored to their original form at the output of said dc restoration circuit.
Claim 15
Dependent Claim 22 words
An isolated drive circuit in accordance with claim 8 wherein said power FET switching amplifier means comprises a pair of FET devices.
Claim 16
Dependent Claim 40 words
An isolated drive circuit in accordance with claim 10 wherein said resistance means prevents the gates of said FET devices from floating under the condition of no pulse train being applied to the primary winding of said input transformer means.

References Cited (Backward Citations)

US4161633A Cited
US4349703A Cited
US4351060A Cited
US4399499A Cited
US4692851A Cited
US4656659A Cited
US4797541A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-03-12 1993-09-11 1994-03-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-03-12 1997-09-11 1998-03-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-03-12 2001-09-11 2002-03-13 $7700.00 Window Closed / Lapsed

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