US4907172A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Character generator with clocking circuitry
Assignee: Minolta Co Ltd
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Filing: 1988-04-01
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Granted: 1990-03-06
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Expires: 2008-04-01
Abstract
Abstract Clocking circuitry for a character generator wherein a control microprocessor controls character generated by hardwired logic through an interface microprocessor, the clocking circuitry including an oscillator which supplies an output to a divider which supplies a reduced frequency signal to the control microprocessor. The output of the oscillator is also supplied to the output of a timing controller. The timing controller further receives a print signal from the interface microprocessor and supplies a plurality of timing signals to the hard wired logic character generator.
Inventors
- 👤 Masaaki Nishiyama
- 👤 Takashi Kadono
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:20
CPC Classifications
G; G06; G06K; G06K15/00; G06K15/02; G06K15/10; G06K2215/00; G06K2215/0002; G06K2215/002; G06K2215/0022
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
81 words
In a character generator having a microprocessor for controlling character generation and a hard logic circuit means for performing the character generation under the control of the microprocessor, a clock means comprising: an oscillator means for providing a clock signal to the hard logic circuit means; and a divider means which is interposed between the oscillator means and the microprocessor for receiving said clock signals from said oscillator means and for providing a clock signal of reduced frequency to said microprocessor.
Claim 2
Dependent Claim
81 words
In a character generator having a microprocessor for controlling character generation and a hard logic circuit means for performing the character generation under the control of the microprocessor, a clock means comprising: an oscillator means for providing a clock signal to the hard logic circuit means; and a divider means which is interposed between the oscillator means and the microprocessor for receiving said clock signals from said oscillator means and for providing a clock signal of reduced frequency to said microprocessor.
Claim 3
Dependent Claim
130 words
In a character generator having a control microprocessor for controlling character generation, and interface processor receiving address and data inputs from said control microprocessor and providing a print signal output, and a hard logic circuit means for performing the character generation under the control of the control microprocessor, a clock means comprising: an oscillator means for providing a clock signal; a timing controller included in said hard logic circuit means receiving said print signal and said clock signal as inputs and providing a plurality of timing signals for timing operation of said hard logic means; and a divider means interposed between the oscillator means and the control microprocessor for receiving said clock signals from said oscillator means and for providing a clock signal of reduced frequency to said control microprocessor.
Claim 4
Dependent Claim
130 words
In a character generator having a control microprocessor for controlling character generation, and interface processor receiving address and data inputs from said control microprocessor and providing a print signal output, and a hard logic circuit means for performing the character generation under the control of the control microprocessor, a clock means comprising: an oscillator means for providing a clock signal; a timing controller included in said hard logic circuit means receiving said print signal and said clock signal as inputs and providing a plurality of timing signals for timing operation of said hard logic means; and a divider means interposed between the oscillator means and the control microprocessor for receiving said clock signals from said oscillator means and for providing a clock signal of reduced frequency to said control microprocessor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-05 | 1993-09-04 | 1994-03-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-05 | 1997-09-04 | 1998-03-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-05 | 2001-09-04 | 2002-03-06 | $7700.00 | Window Closed / Lapsed |