US4525685A
Expired / Lapsed
US
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Disciplined oscillator system with frequency control and accumulated time control
Assignee: Orolia USA Inc
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Filing: 1983-05-31
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Granted: 1985-06-25
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Expires: 2003-05-31
Abstract
Abstract A disciplined oscillator system having a standard oscillator which is automatically corrected for both frequency errors and time error accumulation to a constant frequency signal which is derived from the WWVB carrier frequency and the WWVB TIME CODE to maintain overall frequency accuracy within one part in 10 9 notwithstanding oscillator aging and in spite of jitter and distortion due to propagation delays and noise which may cause loss of, or time jitter in, the WWVB signals. Frequency errors are detected through the use of a counter (24) having a measurement accuracy greater than one part in 10 10 . An error detector (26) derives correction signals by averaging a plurality of frequency variances obtained in successive measurement cycles. Timing errors are corrected by dividers (34, 40) controlled by a timing discriminator (36) which responds to timing variance between signals from the standard oscillator and from the WWVB reference which are phase locked to those TIME CODE signals which are substantially free of noise and jitter. The timing correction is inhibited after the standard oscillator is corrected. Frequency correction is applied continuously.
Inventors
- 👤 Robert J. Hesselberth
- 👤 Thomas P. Donaher
- 👤 Joel E. Sandahl
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 01:29
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; G; G04; G04R; G04R20/00; G04R20/08; G04R20/12
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
116 words
A disciplined oscillator system which comprises means for providing constant frequency signals including pulses which are repetitive at fixed intervals of time, standard frequency oscillator means for providing a standard frequency output and having an input for controlling the frequency thereof, frequency controller means responsive to said constant frequency signals for detecting variances in the frequency of said standard frequency output and providing a frequency control signal, time controller means responsive to said pulses for detecting time displacements of said standard frequency output with respect to said pulses for providing a timing control signal, and means responsive to said frequency control signal and to said timing control signal for applying a correction signal to said input.
Claim 2
Dependent Claim
116 words
A disciplined oscillator system which comprises means for providing constant frequency signals including pulses which are repetitive at fixed intervals of time, standard frequency oscillator means for providing a standard frequency output and having an input for controlling the frequency thereof, frequency controller means responsive to said constant frequency signals for detecting variances in the frequency of said standard frequency output and providing a frequency control signal, time controller means responsive to said pulses for detecting time displacements of said standard frequency output with respect to said pulses for providing a timing control signal, and means responsive to said frequency control signal and to said timing control signal for applying a correction signal to said input.
Claim 3
Dependent Claim
48 words
The disciplined oscillator system according to claim 1 further comprising means for detecting when timing errors between said standard frequency output and said pulses are eliminated, and means responsive to the detection of the elimination of said timing errors for inhibiting the generation of said timing control signal.
Claim 4
Dependent Claim
59 words
The disciplined oscillator system according to claim 1 further comprising means for detecting said variances in the frequency of said standard frequency output repetitively at successive intervals of time, and means for inhibiting the generation of said frequency control signal unless a plurality of consecutive ones of said variances are each more than one part in 10 9 .
Claim 5
Dependent Claim
103 words
The disciplined oscillator system according to claim 3 further comprising means for detecting a variance in frequency of said standard frequency output at any of said successive intervals of time which exceeds the correction range of said means for applying the correction signal, means for detecting a time displacement of said standard frequency output at any of said successive intervals of time which exceeds the correction range of said means for applying said correction signal, and means for indicating an alarm condition in response to the detection of said excessive variance in frequency or time displacement by said last two named detecting means.
Claim 6
Dependent Claim
40 words
The disciplined oscillator system according to claim 4 wherein said excessive variance in frequency is a variance which exceeds one part in 10 8 and said excessive time displacement is a time displacement which exceeds plus or minus 2 milliseconds.
Claim 7
Dependent Claim
43 words
The disciplined oscillator system according to claim 1 wherein said means for providing said constant frequency signals comprises radio receiver means responsive to a radio transmission of constant frequency signals modulated with said pulses for providing said constant frequency signals and said pulses.
Claim 8
Dependent Claim
88 words
The disciplined oscillator system according to claim 6 wherein said radio receiver means includes circuits tuned to the National Bureau of Standards (NBS) radio station WWVB which provides said constant frequency signals at 60 KHz modulated by time code signals each second which provide said pulses, and said radio receiver means also including means for providing said constant frequency signals at the frequency of said standard oscillator and locked to said 60 KHz signals, and means for demodulating said time code signals to provide said pulses each second.
Claim 9
Dependent Claim
50 words
The disciplined oscillator system according to claim 6 further comprising means for selectively operating said time controller means in response to those of said pulses which are substantially free of noise thereby preventing the adjustment of said standard oscillator means except in response to times stable ones of said pulses.
Claim 10
Dependent Claim
35 words
The disciplined oscillator system according to claim 8 wherein said selectively operating means also includes means for selecting those of said pulses which are substantially free of intersymbol interference for operating said time controller means.
Claim 11
Dependent Claim
99 words
The disciplined oscillator system according to claim 1 wherein said frequency controller means comprises a counter having a capacity to count to a number greater than the resolution in frequency to which said standard frequency output is to be controlled, means responsive to said constant frequency signals for repetitively enabling said counter to count said standard frequency output for an interval upon each repetition sufficient to count a number of cycles of said standard frequency output at least equal to said frequency resolution, and means responsive to the counts stored in said counter for providing said frequency control signal.
Claim 12
Dependent Claim
82 words
The disciplined oscillator system according to claim 10 wherein said means responsive to said counts comprises means for detecting when variances in the counts stored in said counter upon each of a plurality of consecutive ones of said repetitions represents at least a certain magnitude of variance, and means responsive to the average of the magnitudes of the variances represented by the counts stored in said counter in said plurality of consecutive ones of said repetitions for providing said frequency control signal.
Claim 13
Dependent Claim
46 words
The disciplined oscillator system according to claim 11 wherein said counter has a count capacity of at least 10 11 counts and said standard frequency output and said interval are sufficient to enable the counting of at least 10 10 repetitions of said standard frequency signal.
Claim 14
Dependent Claim
54 words
The disciplined oscillator system according to claim 12 wherein said enabling means comprises means for generating a gate signal in response to said constant frequency signal of duration equal to said interval, and means for synchronously gating said standard frequency output into said counter during each said repetition in response to said gate signal.
Claim 15
Dependent Claim
66 words
The disciplined oscillator system according to claim 13 wherein said means for providing said frequency control signal includes means for providing said frequency control signal as a multi-bit digital signal, and means for converting said digital signal into an analog signal having at least as many parts as the product of the tuning range of said standard frequency oscillator and the duration of said gate signal.
Claim 16
Dependent Claim
53 words
The disciplined oscillator system according to claim 13 wherein said standard frequency output and said constant frequency output are each nominally 10 MHz, said counter is a binary counter of at least 48 bits capacity, and said gate signal is 1,000 seconds in duration and said repetition occurs at intervals of 5 milliseconds.
Claim 17
Dependent Claim
25 words
The disciplined oscillator system according to claim 13 wherein said means for providing said gate signal and providing said frequency control signal comprises a microprocessor.
Claim 18
Dependent Claim
61 words
The disciplined oscillator system according to claim 1 wherein said time controller means comprises means responsive to said constant frequency signals and said fixed interval pulses for providing a train of reference pulses time-locked to said fixed interval pulses, and means responsive to the phase difference between said fixed interval pulses and said reference pulses for producing said timing control signal.
Claim 19
Dependent Claim
122 words
The disciplined oscillator system according to claim 17 wherein said phase difference responsive means includes means for deriving a plurality of successive outputs representing the relative times of occurrence (early and late) of a plurality of successive ones of said reference pulses and said fixed interval pulses, and means for detecting when the number of outputs in said plurality of one type exceeds the number of outputs of the other type to provide an output representing the sense of said phase difference, said phase difference responsive means comprising means for producing a timing correction signal for an incremental offset in frequency of said standard oscillator means in a sense corresponding to the sense of said phase difference, as said timing control signal.
Claim 20
Dependent Claim
39 words
The disciplined oscillator system according to claim 18 further comprising means responsive to a change in the sense of said phase difference representing output for inhibiting the generation of said timing control signal by said phase difference responsive means.
Claim 21
Dependent Claim
37 words
The disciplined oscillator system according to claim 17 further comprising means for selecting those of said fixed interval pulses which are substantially free from time jitter to operate said means for producing said train of reference pulses.
Claim 22
Dependent Claim
87 words
The disciplined oscillator system according to claim 17 wherein said means for producing said reference pulses comprises means for dividing said constant frequency signals in frequency to the repetition frequency of said fixed interval pulses, means for detecting the sense (early and late) and magnitude of the difference of the relative times of occurrence of said fixed interval pulses and said reference pulses from said dividing means for changing the dividing ratio of said dividing means to time lock said reference pulses to said fixed interval pulses.
Claim 23
Dependent Claim
49 words
The disciplined oscillator system according to claim 21 further comprising means for selecting those of said fixed interval pulses which are substantially free from time jitter for operating said means for detecting the sense and magnitude of the relative times of occurrence of said fixed interval and reference pulses.
Claim 24
Dependent Claim
117 words
The disciplined oscillator system according to claim 22 wherein said means for detecting the sense and magnitude of difference in relative time of occurrence of said fixed and reference pulses includes means responsive to the relative times of occurrence of said reference and fixed interval pulses for producing first outputs representing whether said reference pulses are early with respect to said fixed interval pulses and second outputs when said reference pulses are late with respect to said fixed intervals pulses, means for counting said outputs during predetermined time intervals for increasing said dividing ratio when said first outputs exceed said second outputs and for a decreasing said dividing ratio when said second outputs exceed said first outputs.
Claim 25
Dependent Claim
34 words
The disciplined oscillator system according to claim 23 wherein microprocessor means is included in said means for changing the dividing ratio of said dividing means and said means for producing said timing control signal.
Claim 26
Dependent Claim
127 words
In a disciplined oscillator system utilizing a constant frequency reference signal and having standard frequency oscillator means for providing a standard frequency output which is variable in response to a frequency control signal, frequency controller means comprising a counter having a capacity to count to a number greater than the resolution in frequency to which said standard frequency output is to be controlled, means responsive to said constant frequency signal for repetitively enabling said counter to count each repetition of said standard frequency output for an interval changed upon each repetitive enablement sufficient to count a number of cycles of said standard frequency output at least equal to said frequency resolution, and means responsive to the counts stored in said counter for providing said frequency control signal.
Claim 27
Dependent Claim
127 words
In a disciplined oscillator system utilizing a constant frequency reference signal and having standard frequency oscillator means for providing a standard frequency output which is variable in response to a frequency control signal, frequency controller means comprising a counter having a capacity to count to a number greater than the resolution in frequency to which said standard frequency output is to be controlled, means responsive to said constant frequency signal for repetitively enabling said counter to count each repetition of said standard frequency output for an interval changed upon each repetitive enablement sufficient to count a number of cycles of said standard frequency output at least equal to said frequency resolution, and means responsive to the counts stored in said counter for providing said frequency control signal.
Claim 28
Dependent Claim
80 words
The system according to claim 25 wherein said means responsive to said counts comprises means for detecting when variances in the counts stored in said counter upon each of a plurality of consecutive ones of said repetitions represents at least a certain magnitude of variance, and means responsive to the average of the magnitudes of the variances represented by the counts stored in said counter in said plurality of consecutive ones of said repetitions for providing said frequency control signal.
Claim 29
Dependent Claim
44 words
The system according to claim 26 wherein said counter has a count capacity of at least 10 11 counts and said standard frequency output and said interval are sufficient to enable the counting of at least 10 10 repetitions of said standard frequency signal.
Claim 30
Dependent Claim
52 words
The system according to claim 27 wherein said enabling means comprises means for generating a gate signal in response to said constant frequency signal of duration equal to said interval, and means for synchronously gating said standard frequency output into said counter during each said repetition in response to said gate signal.
Claim 31
Dependent Claim
64 words
The system according to claim 28 wherein said means for providing said frequency control signal includes means for providing said frequency control signal as a multi-bit digital signal, and means for converting said digital signal into an analog signal having at least as many parts as the product of the tuning range of said standard frequency oscillator and the duration of said gate signal.
Claim 32
Dependent Claim
53 words
The disciplined oscillator system according to claim 28 wherein said standard frequency output and said constant frequency output are each nominally 10 MHz, said counter is a binary counter of at least 48 bits capacity, and said gate signal is 1,000 seconds in duration and said repetition occurs at intervals of 5 milliseconds.
Claim 33
Dependent Claim
25 words
The disciplined oscillator system according to claim 28 wherein said means for providing said gate signal and providing said frequency control signal comprises a microprocessor.
Claim 34
Dependent Claim
87 words
In a disciplined oscillator system utilizing a source of pulses repetitive at fixed intervals of time and having standard oscillator means having a standard frequency output which is variable in frequency in response to a control signal, time controller means comprising means responsive to said standard frequency output and said fixed interval pulses for providing a train of reference pulses time-locked to said fixed interval pulses, and means responsive to the phase difference between said fixed interval pulses and said reference pulses for producing said control signal.
Claim 35
Dependent Claim
87 words
In a disciplined oscillator system utilizing a source of pulses repetitive at fixed intervals of time and having standard oscillator means having a standard frequency output which is variable in frequency in response to a control signal, time controller means comprising means responsive to said standard frequency output and said fixed interval pulses for providing a train of reference pulses time-locked to said fixed interval pulses, and means responsive to the phase difference between said fixed interval pulses and said reference pulses for producing said control signal.
Claim 36
Dependent Claim
119 words
The system according to claim 32 wherein said phase difference responsive means includes means for deriving a plurality of successive outputs representing the relative times of occurrence (early and late) of a plurality of successive ones of said reference pulses and said fixed interval pulses, and means for detecting when the number of outputs in said plurality of one type exceeds the number of outputs of the other type to provide an output representing the sense of said phase difference, said phase difference responsive means comprising means for producing a timing correction signal for an incremental offset in frequency of said standard oscillator means in a sense corresponding to the sense of said phase difference, as said control signal.
Claim 37
Dependent Claim
37 words
The system according to claim 32 further comprising means responsive to a change in the sense of said phase difference representing output for inhibiting the generation of said timing control signal by said phase difference responsive means.
Claim 38
Dependent Claim
35 words
The system according to claim 32 further comprising means for selecting those of said fixed interval pulses which are substantially free from time jitter to operate said means for producing said train of reference pulses.
Claim 39
Dependent Claim
85 words
The system according to claim 32 wherein said means for producing said reference pulses comprises means for dividing said constant frequency signals in frequency to the repetition frequency of said fixed interval pulses, means for detecting the sense (early and late) and magnitude of the difference of the relative times of occurrence of said fixed interval pulses and said reference pulses from said dividing means for changing the dividing ratio of said dividing means to time lock said reference pulses to said fixed interval pulses.
Claim 40
Dependent Claim
47 words
The system according to claim 36 further comprising means for selecting those of said fixed interval pulses which are substantially free from time jitter for operating said means for detecting the sense and magnitude of the relative times of occurrence of said fixed interval and reference pulses.
Claim 41
Dependent Claim
126 words
The system according to claim 37 wherein said means for detecting the sense and magnitude of difference in relative time of occurrence of said fixed and reference pulses includes means responsive to the relative times of occurrence of said reference and fixed interval pulses for producing first outputs representing whether said reference pulses are early with respect to said fixed interval pulses and second outputs when said reference pulses are late with respect to said fixed intervals pulses, means for counting said outputs during predetermined time intervals for increasing said dividing ratio when said first outputs said representing said early reference pulses exceed said second outputs and for a decreasing said dividing ratio when said second outputs representing the late reference pulses exceed said first outputs.
Claim 42
Dependent Claim
32 words
The system according to claim 38 wherein microprocessor means is included in said means for changing the dividing ratio of said dividing means and said means for producing said timing control signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-06-24 | 1988-12-24 | 1989-06-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-06-24 | 1992-12-24 | 1993-06-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-06-24 | 1996-12-24 | 1997-06-25 | $7700.00 | Window Closed / Lapsed |