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US4906856A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductive photodetection device having coplanar circuit components

Assignee: Seiko Instruments Inc
•
Filing: 1988-03-23
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Granted: 1990-03-06
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Expires: 2008-03-23
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Abstract

Abstract A photoelectric conversion array is comprised of a longitudinal semiconductor substrate formed with a plurality of doped regions electrically isolated from one another and equidistantly aligned in the longitudinal direction of the substrate. Each doped region is comprised of a first region containing therein base, collector and emitter regions arranged to constitute a bipolar phototransistor operative in response to irradiation of incident light onto the base region to induce a photoelectric current between the collector and emitter regions, and a second region disposed adjacent to and laterally of the first region and containing therein a drain region, a source region, a channel region between the drain and source regions and a gate region disposed on the channel region to constitute a MOS switching transistor electrically connected in series to the bipolar phototransistor and selectively operative in response to a control voltage applied to the gate region to enable the induced photoelectric current to flow through the channel region to thereby drive the corresponding bipolar phototransistor.

Inventors

  • 👤 Eiichi Iwanami
  • 👤 Yukito Kawahara
  • 👤 Hiroshi Mukainakano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 06:25
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/04; H04N1/19; H04N1/1906; H04N1/024; H04N1/028; H04N1/03; H04N1/031; H04N1/40; H04N1/40056; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/197; H04N1/191; H04N1/192; H04N1/193

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 193 words
A photoelectric conversion array, comprising: an elongate semiconductor substrate having a major surface portion; means on defining on the substrate major surface portion a plurality of doped regions electrically isolated from one another and equi-distantly aligned in the longitudinal direction of the substrate, each doped region being comprised of a first region containing therein base, collector and emitter regions arranged to constitute a bipolar phototransistor operative in response to irradiation of incident light onto the base region to induce a photoelectric current between the collector and emitter regions, and a second region coplanar with the first region and containing therein a drain region, a source region, a channel region between the drain and source regions and a gate region disposed on the channel region to constitute a MOS transistor electrically connected in series to the bipolar phototransistor and operative in response to a control voltage applied to the gate region to enable to induced photoelectric current to flow through the channel region to thereby drive the bipolar phototransistor; and drive means formed in the substrate major surface portion for sequentially applying a control voltage to the respective gate regions of the MOS transistors.
Claim 2
Dependent Claim 193 words
A photoelectric conversion array, comprising: an elongate semiconductor substrate having a major surface portion; means on defining on the substrate major surface portion a plurality of doped regions electrically isolated from one another and equi-distantly aligned in the longitudinal direction of the substrate, each doped region being comprised of a first region containing therein base, collector and emitter regions arranged to constitute a bipolar phototransistor operative in response to irradiation of incident light onto the base region to induce a photoelectric current between the collector and emitter regions, and a second region coplanar with the first region and containing therein a drain region, a source region, a channel region between the drain and source regions and a gate region disposed on the channel region to constitute a MOS transistor electrically connected in series to the bipolar phototransistor and operative in response to a control voltage applied to the gate region to enable to induced photoelectric current to flow through the channel region to thereby drive the bipolar phototransistor; and drive means formed in the substrate major surface portion for sequentially applying a control voltage to the respective gate regions of the MOS transistors.
Claim 3
Dependent Claim 58 words
A photoelectric conversion array according to claim 1; wherein the longitudinal semiconductor substrate comprises a semiconductor base, and an epitaxial layer disposed on the semiconductor base and defining the major surface portion of the semiconductor substrate, the epitaxial layer having an insulating region bordering the plurality of doped regions to electrically insulate the doped regions from each other.
Claim 4
Dependent Claim 37 words
A photoelectric conversion array according to claim 1; wherein the first region contains a base region, and an emitter region disposed within the base region to form a PN junction therebetween effective to induce a photoelectric current.
Claim 5
Dependent Claim 54 words
A photoelectric conversion array according to claim 1; wherein the second region contains two sets of drain, source, channel and gate regions of different conductive types to constitute a pair of N-channel and P-channel MOS transistors, one of the pair of MOS transistors of each of the second regions jointly comprising the drive means.
Claim 6
Dependent Claim 35 words
A photoelectric conversion array according to claim 1; including a first electrode region electrically connecting the collector region to ground potential, and a second electrode region electrically connecting the emitter region to the channel region.
Claim 7
Dependent Claim 27 words
A photoelectric coversion array according to claim 1; wherein the drive means comprises shift register means for sequentially assigning a control voltage to the respective MOS transistors.
Claim 8
Dependent Claim 36 words
A photoelectric conversion array according to claim 6; wherein the shift register means comprises a plurality of shift register stages corresponding in number to the number of MOS transistors and being comprised of other MOS transistors.
Claim 9
Dependent Claim 179 words
A photoelectric conversion array, comprising: a semiconductor substrate having a major surface portion; a plurality of bipolar transistors formed in a row on the substrate major surface portion and being equi-distantly spaced apart in the row direction, each of the bipolar transistors having a collector region, an emitter region and a base region and being operative in response to irradiation of incident light onto the base region to induce a photoelectric current signal between the collector and emitter regions; and read-out means formed on the substrate major surface portion for sequentially reading out the photoelectric current signals produced by the bipolar transistors, the read-out means comprising a plurality of signal transmitting elements formed in a row on the substrate major surface portion in parallel with and laterally spaced from the row of bipolar transistors, each signal transmitting element being electrically connected to a corresponding one of the bipolar transistors and operative when enabled to transmit therethrough the photoelectric current signal, and shift register means for sequentially enabling the signal transmitting elements to thereby read out the photoelectric current signals.
Claim 10
Dependent Claim 179 words
A photoelectric conversion array, comprising: a semiconductor substrate having a major surface portion; a plurality of bipolar transistors formed in a row on the substrate major surface portion and being equi-distantly spaced apart in the row direction, each of the bipolar transistors having a collector region, an emitter region and a base region and being operative in response to irradiation of incident light onto the base region to induce a photoelectric current signal between the collector and emitter regions; and read-out means formed on the substrate major surface portion for sequentially reading out the photoelectric current signals produced by the bipolar transistors, the read-out means comprising a plurality of signal transmitting elements formed in a row on the substrate major surface portion in parallel with and laterally spaced from the row of bipolar transistors, each signal transmitting element being electrically connected to a corresponding one of the bipolar transistors and operative when enabled to transmit therethrough the photoelectric current signal, and shift register means for sequentially enabling the signal transmitting elements to thereby read out the photoelectric current signals.
Claim 11
Dependent Claim 94 words
A photoelectric conversion array according to claim 8; wherein the signal transmitting elements comprise MOS transistors, each of the MOS transistors having a drain region, a source region, a channel region between the source and drain regions and a gate electrode disposed on the channel region, and each of the MOS transistors being electrically connected in series to a corresponding one of the plurality of bipolar transistors and operative in response to a control voltage applied to the gate electrode thereof to enable the photoelectric current signal to flow through the channel region thereof.
Claim 12
Dependent Claim 36 words
A photoelectric conversion array according to claim 8; wherein each bipolar transistor and its corresponding signal transmitting element are formed on the same plane with respect to the depth direction of the substrate major surface portion.
Claim 13
Dependent Claim 30 words
A photoelectric conversion array according to claim 10; wherein each of the signal transmitting elements comprises a MOS transistor electrically connected to the emitter region of its corresponding bipolar transistor.
Claim 14
Dependent Claim 31 words
A photoelectric conversion array according to claim 11 wherein the shift register means has a plurality of stages, each stage being connected to the gate electrode of a corresponding MOS transistor.
Claim 15
Dependent Claim 57 words
A photoelectric conversion array according to claim 12; wherein the pitch of the bipolar transistors in the row direction is about 62.5 μm, each bipolar transistor having dimensions between about 10 μm and about 32.5 μm in the row direction and between about 25 μm and about 62.5 μm in a direction transverse to the row direction.
Claim 16
Dependent Claim 137 words
A photoelectric conversion array, comprising: a semiconductor substrate having a major surface portion; a plurality of bipolar transistors for producing video signals, the bipolar transistors being formed in a row on the substrate major surface portion and being equi-distantly spaced apart in the row direction and read-out means disposed in parallel with the row of bipolar transistors and formed on the substrate major surface portion on the same plane with the bipolar transistors for reading out the video signals from the bipolar transistors, said read-out means comprising a plurality of signal transmitting elements each electrically connected to a respective one of the bipolar transistors and operative when activated to transmit therethrough the video signal, and shift register means for sequentially activating the signal transmitting elements to thereby sequentially read out the video signals from the bipolar transistors.
Claim 17
Dependent Claim 137 words
A photoelectric conversion array, comprising: a semiconductor substrate having a major surface portion; a plurality of bipolar transistors for producing video signals, the bipolar transistors being formed in a row on the substrate major surface portion and being equi-distantly spaced apart in the row direction and read-out means disposed in parallel with the row of bipolar transistors and formed on the substrate major surface portion on the same plane with the bipolar transistors for reading out the video signals from the bipolar transistors, said read-out means comprising a plurality of signal transmitting elements each electrically connected to a respective one of the bipolar transistors and operative when activated to transmit therethrough the video signal, and shift register means for sequentially activating the signal transmitting elements to thereby sequentially read out the video signals from the bipolar transistors.
Claim 18
Dependent Claim 21 words
A photoelectric conversion array according to claim 14; wherein the signal transmitting elements and the shift register means comprise MOS transistors.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-03-05 1993-09-04 1994-03-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-03-05 1997-09-04 1998-03-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-03-05 2001-09-04 2002-03-06 $7700.00 Window Closed / Lapsed

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