Patent US4905069A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4905069A Expired / Lapsed US ⏱️ 0.0 years remaining

Darlington transistor arrangement

Assignee: Fuji Electric Co Ltd
•
Filing: 1984-11-13
•
Granted: 1990-02-27
•
Expires: 2004-11-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract In the particular embodiment described in the specification, a Darlington transistor arrangement has a stepped upper surface with an emitter terminal of the preceding transistor disposed at the bottom of a groove formed between spaced raised portions on which the collector terminal and the emitter terminal of the transistor are located. A base terminal is disposed at a lower surface formed on the outside of the raised portion where either the collector terminal or the emitter terminal is situated, thereby providing sufficient insulation distance between terminals and avoiding the problem resulting from a crossing between the power wiring to the load or power source and the base driving wiring.

Inventors

  • 👤 Hisao Shigekane

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 15:51
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W90/00

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 125 words
A Darlington transistor including a resin housing body having a stepped surface comprising alternating upper and lower planar portions; a collector terminal and an emitter terminal formed on respective upper portions of the stepped surface; a base terminal and an emitter-base terminal formed on respective lower portions of the stepped surface, wherein the lower portion of the stepped surface on which the base terminal is formed is situated between an edge of the stepped surface and the upper portions thereof on which the collector and emitter terminals are respectively formed and the lower portion of the stepped surface on which the emitter-base terminal is formed is situated between the upper portions of the stepped surface on which the collector and emitter terminals are respectively formed.
Claim 2
Dependent Claim 125 words
A Darlington transistor including a resin housing body having a stepped surface comprising alternating upper and lower planar portions; a collector terminal and an emitter terminal formed on respective upper portions of the stepped surface; a base terminal and an emitter-base terminal formed on respective lower portions of the stepped surface, wherein the lower portion of the stepped surface on which the base terminal is formed is situated between an edge of the stepped surface and the upper portions thereof on which the collector and emitter terminals are respectively formed and the lower portion of the stepped surface on which the emitter-base terminal is formed is situated between the upper portions of the stepped surface on which the collector and emitter terminals are respectively formed.

References Cited (Backward Citations)

US4106052A Cited
US4518982A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-02-26 1993-08-28 1994-02-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-02-26 1997-08-28 1998-02-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-02-26 2001-08-28 2002-02-27 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag