US4904888A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sense amplifier circuit
Assignee: Panasonic Holdings Corp
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Filing: 1988-10-03
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Granted: 1990-02-27
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Expires: 2008-10-03
Abstract
Abstract In order to enhance the sensitivity of a sense amplifier circuit, each one of the transistor pair composing the sense amplifier circuit is formed by transistors connected parallel in an even number of stages, and therefore the sense amplifier circuit is made of transistor pair having an extremely balanced characteristic, cancelling the asymmetricity of current-voltage characteristic of the transistor pair to null.
Inventors
- 👤 Hiroyuki Yamauchi
- 👤 Toshio Yamada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:09
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C7/00; G11C7/06; G11C7/065; H; H03; H03K; H03K17/00; H03K17/10; H03K17/102; H03K17/14; H03K17/145
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
125 words
A sense amplifier circuit comprising first and second bit wires coupled to a memory cell, a first MOS transistor having a drain connected to said first bit wire, said second bit wire is coupled to the gate of the first MOS transistor, a second MOS transistor having a drain connected to said second bit wire, and either an N-type a P-type MOS transistor pair to compose a latch type sense amplifier circuit by coupling the gate of the second MOS transistor and the first bit wire, and coupling the sources of the first and second MOS transistors commonly to a power source wire, wherein both first and second MOS transistors are composed of a plurality of either N-type or P-type MOS transistor connected in parallel.
Claim 2
Dependent Claim
125 words
A sense amplifier circuit comprising first and second bit wires coupled to a memory cell, a first MOS transistor having a drain connected to said first bit wire, said second bit wire is coupled to the gate of the first MOS transistor, a second MOS transistor having a drain connected to said second bit wire, and either an N-type a P-type MOS transistor pair to compose a latch type sense amplifier circuit by coupling the gate of the second MOS transistor and the first bit wire, and coupling the sources of the first and second MOS transistors commonly to a power source wire, wherein both first and second MOS transistors are composed of a plurality of either N-type or P-type MOS transistor connected in parallel.
Claim 3
Dependent Claim
65 words
A sense amplifier circuit comprises forming first and second MOS transistors of a transistor pair in the same region as the first MOS transistor of the transistor pair at both sides adjacent in the column direction, and also forming the second MOS transistor in the same region as the second MOS transistor of the pair of transistors at both sides adjacent in the column direction.
Claim 4
Dependent Claim
65 words
A sense amplifier circuit comprises forming first and second MOS transistors of a transistor pair in the same region as the first MOS transistor of the transistor pair at both sides adjacent in the column direction, and also forming the second MOS transistor in the same region as the second MOS transistor of the pair of transistors at both sides adjacent in the column direction.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-02-26 | 1993-08-28 | 1994-02-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-02-26 | 1997-08-28 | 1998-02-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-02-26 | 2001-08-28 | 2002-02-27 | $7700.00 | Window Closed / Lapsed |