Semiconductor integrated circuit device double isolated CMOS input protection resistor

Claim 1

A semiconductor integrated circuit device incorporating a bipolar transistor and MISFET comprising: a semiconductor substrate of a first conductivity type having at least an input protective portion and an input buffer circuit portion, said portions being respectively formed near a main surface of said semiconductor substrate; a first semiconductor region of the first conductivity type formed in said input protective portion of said substrate, said first semiconductor region having a lowermost face and end sides; a second semiconductor region of a second, conductivity type, opposite said first conductivity type, formed in said input protective portion of said substrate so that said first semiconductor region is surrounded at its lowermost face and end sides by said second semiconductor region and is electrically isolated from said semiconductor substrate; a third semiconductor region of the second conductivity type formed in said first semiconductor region; a MISFET formed in said input buffer portion of said substrate; and a first voltage supplying line for supplying a first operating voltage and a second voltage supplying line for supplying a second operating voltage, wherein said second semiconductor region is connected to said first operating voltage supplying line and said semiconductor substrate is connected to said second operating voltage supplying line, the polarity of said first operating voltage with respect to said second operating voltage being such as to effect a reverse bias condition between said second semiconductor region and said semiconductor substrate, said third semiconductor region has one end connected to an input terminal and another end connected to a gate electrode of said MISFET formed in said semiconductor substrate of said input buffer circuit portion, and wherein said first region is to be in an electrically floating state during operation of said device.