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US4899098A
Expired / Lapsed
US
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Low voltage drop series regulator with overvoltage and overcurrent protection
Assignee: STMicroelectronics SRL
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Filing: 1988-06-27
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Granted: 1990-02-06
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Expires: 2008-06-27
Abstract
Abstract A series voltage regulator includes a protective circuit that detects the collector current from a PBP power transistor and the collector-emitter voltage thereof. Such current and voltage signals are generated, respectively, by an auxiliary PNP transistor having a collector current which is proportional to that of the PNP power transistor, and by a circuit connected between the emitter and the collector of the PNP power transistor. The collector current and collector emitter voltage signals are processed by a circuit which, whenever the current and voltage values are greater than preset maximum values, reduces the PNP power transistor current and maintains it within permissible limits. The protective circuit does not affect the minimum voltage drop between the input and output of the regulator and may be dimensioned so as to use the maximum extent of the S.O.A. of the PNP power transistor.
Inventors
- 👤 Roberto Gariboldi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 15:27
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565; G05F1/569
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
361 words
An integratable series voltage regulator having a low voltage drop, and having a power transistor protected against overvoltages and overcurrents, comprising: an input terminal and an output terminal respectively connected to an emitter terminal and to a collector terminal of said power transistor; a common terminal which is common to both said input and output terminals; a first means for providing a voltage proportional to an output voltage between said output terminal and common terminal; a comparison and control circuit means having an output connected to a base terminal of said power transistor, a first input terminal connected to said first means and a second input terminal connected to a reference voltage, said reference voltage having a value such that a control current flows into said base of said power transistor in order to keep said output voltage between said output terminal and said common terminal at a substantially constant predetermined value; a means for determining a collector current of said power transistor, comprising an auxiliary transistor having its base and emitter terminals respectively coupled to the base and emitter terminals of said power transistor, wherein a collector of said auxiliary transistor provides a first measuring current which is substantially proportional to said collector current of said power transistor; a circuit means for determining the collector-emitter voltage of said power transistor and for generating a second measuring current at its output terminal when said collector-emitter voltage of said power transistor exceeds a preset value; a processing circuit means having a summing input node, to which are connected said collector of said auxiliary transistor and said output terminal of said circuit means for determining the collector-emitter voltage of said power transistor, and an output terminal connected to a third input terminal of said comparison and control circuit means, said processing circuit means reducing a control current to said power transistor as a function of the algebraic sum of said first and second measuring currents, when said sum exceeds a limiting value of current, said limiting value being arranged such that said collector current and said collector-emitter voltage of said power transistor define a point within safe operating area of said power transistor.
Claim 2
Dependent Claim
361 words
An integratable series voltage regulator having a low voltage drop, and having a power transistor protected against overvoltages and overcurrents, comprising: an input terminal and an output terminal respectively connected to an emitter terminal and to a collector terminal of said power transistor; a common terminal which is common to both said input and output terminals; a first means for providing a voltage proportional to an output voltage between said output terminal and common terminal; a comparison and control circuit means having an output connected to a base terminal of said power transistor, a first input terminal connected to said first means and a second input terminal connected to a reference voltage, said reference voltage having a value such that a control current flows into said base of said power transistor in order to keep said output voltage between said output terminal and said common terminal at a substantially constant predetermined value; a means for determining a collector current of said power transistor, comprising an auxiliary transistor having its base and emitter terminals respectively coupled to the base and emitter terminals of said power transistor, wherein a collector of said auxiliary transistor provides a first measuring current which is substantially proportional to said collector current of said power transistor; a circuit means for determining the collector-emitter voltage of said power transistor and for generating a second measuring current at its output terminal when said collector-emitter voltage of said power transistor exceeds a preset value; a processing circuit means having a summing input node, to which are connected said collector of said auxiliary transistor and said output terminal of said circuit means for determining the collector-emitter voltage of said power transistor, and an output terminal connected to a third input terminal of said comparison and control circuit means, said processing circuit means reducing a control current to said power transistor as a function of the algebraic sum of said first and second measuring currents, when said sum exceeds a limiting value of current, said limiting value being arranged such that said collector current and said collector-emitter voltage of said power transistor define a point within safe operating area of said power transistor.
Claim 3
Dependent Claim
82 words
A regulator as set forth in claim 1, wherein said circuit means for determining the collector-emitter voltage of said power transistor comprises at least one circuit branch, which is connected between said emitter and collector of said power transistor and comprises the series connection of: a resistance element, at least one Zener diode and an emitter-base junction of a determining transistor whose collector is coupled to said output terminal of said circuit means for detecting the collector-emitter voltage of said power transistor.
Claim 4
Dependent Claim
74 words
A regulator as set forth in claim 2, wherein said circuit means for determining the collector-emitter voltage of said power transistor comprises a first circuit branch whose determining transistor has its collector connected directly to said output terminal of said means for determining the collector-emitter voltage of said power transistor and a second circuit branch having a determining transistor which has its collector coupled to said input summing node via a current mirror circuit.
Claim 5
Dependent Claim
73 words
A regulator as set forth in claim 3, wherein said processing circuit means further comprises a circuit means for setting said limiting current value, a current mirror having a first branch connected to said input summing node, and a second branch connected to said circuit means for setting said limiting current value and to a base of a coupling transistor whose emitter is connected to an output terminal of said processing circuit means.
Claim 6
Dependent Claim
73 words
A regulator as set forth in claim 2, wherein said processing circuit means further comprises a circuit means for setting said limiting current value, a current mirror having a first branch connected to said input summing node, and a second branch connected to said circuit means for setting said limiting current value and to a base of a coupling transistor whose emitter is connected to an output terminal of said processing circuit means.
Claim 7
Dependent Claim
73 words
A regulator as set forth in claim 1, wherein said processing circuit means further comprises a circuit means for setting said limiting current value, a current mirror having a first branch connected to said input summing node, and a second branch connected to said circuit means for setting said limiting current value and to a base of a coupling transistor whose emitter is connected to an output terminal of said processing circuit means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-02-05 | 1993-08-07 | 1994-02-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-02-05 | 1997-08-07 | 1998-02-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-02-05 | 2001-08-07 | 2002-02-06 | $7700.00 | Window Closed / Lapsed |