US4897757A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Protection structure for an integrated circuit
Assignee: STMicroelectronics SA
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Filing: 1988-12-06
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Granted: 1990-01-30
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Expires: 2008-12-06
Abstract
Abstract In the substrate (23) of an integrated circuit, around a pad area, a first region (24) of the first conductivity type having a high doping level in turn formed in a second region (25) of the second conductivity type and, beyond the first region with respect to the pad, a third region (26) of the second conductivity type at least partially in contact with the second region, are formed. The pad metallization (20) also establishes a contact with a portion (27) of the first region surface. A second metallization (30) connects the first region to the third one at such a location that the current path between, on the one hand, the contact area between the pad metallization and the first region and, on the other hand, the area where the third region forms a junction with the substrate (corresponding to an avalanche diode) follows a resistive path in at least one of the first or third regions.
Inventors
- 👤 Francois Tailliet
- 👤 Jean-Marie Gaultier
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 05:44
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10W; H10W72/00; H10W72/90; H10W72/921; H10W72/922
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
215 words
A protection structure for an integrated circuit connected to a pad liable to receive overvoltages, the integrated circuit being formed in a substrate (23; 52) of a first conductivity type having a low doping level, this substrate being connected to a reference voltage, comprising, in the substrate, around the pad area and according to a configuration surrounding at least partially this pad area: a first region (24; 54) of the first conductivity type having a high doping level, in turn formed in a second region (25; 55) of the second conductivity type, and beyond the first region with respect to the pad, a third region (26; 60) of the second conductivity type partially in contact at least with the second region; and wherein: the pad metallization (20; 50) also establishes a contact with a portion (27; 56) of the first region surface, a second metallization (30; 50) connects the first region to the third one at such a location that the current path between, on the one hand, the contact area between the pad metallization and the first region and, on the other hand, the area where the third region forms a junction with the substrate (corresponding to an avalanche diode) follows a resistive path in at least one of the first or third region.
Claim 2
Dependent Claim
215 words
A protection structure for an integrated circuit connected to a pad liable to receive overvoltages, the integrated circuit being formed in a substrate (23; 52) of a first conductivity type having a low doping level, this substrate being connected to a reference voltage, comprising, in the substrate, around the pad area and according to a configuration surrounding at least partially this pad area: a first region (24; 54) of the first conductivity type having a high doping level, in turn formed in a second region (25; 55) of the second conductivity type, and beyond the first region with respect to the pad, a third region (26; 60) of the second conductivity type partially in contact at least with the second region; and wherein: the pad metallization (20; 50) also establishes a contact with a portion (27; 56) of the first region surface, a second metallization (30; 50) connects the first region to the third one at such a location that the current path between, on the one hand, the contact area between the pad metallization and the first region and, on the other hand, the area where the third region forms a junction with the substrate (corresponding to an avalanche diode) follows a resistive path in at least one of the first or third region.
Claim 3
Dependent Claim
78 words
A protection circuit for an integrated circuit connected to a pad liable to receive overvoltages, wherein the pad (20; 50) is connected to a reference voltage (33; 70) through a first path comprising a transistor (41) and through a second path comprising a resistor (42) in series with an avalanche diode (44), and wherein the transistor base and the junction point of said resistor and said avalanche diode are interconnected to the integrated circuit access to be protected.
Claim 4
Dependent Claim
78 words
A protection circuit for an integrated circuit connected to a pad liable to receive overvoltages, wherein the pad (20; 50) is connected to a reference voltage (33; 70) through a first path comprising a transistor (41) and through a second path comprising a resistor (42) in series with an avalanche diode (44), and wherein the transistor base and the junction point of said resistor and said avalanche diode are interconnected to the integrated circuit access to be protected.
Claim 5
Dependent Claim
25 words
A circuit according to claim 2, further comprising a third path comprising a forward-connected diode (75) between the reference voltage (70) and the pad (50).
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-29 | 1993-07-31 | 1994-01-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-29 | 1997-07-31 | 1998-01-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-29 | 2001-07-31 | 2002-01-30 | $7700.00 | Window Closed / Lapsed |