US4896203A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Heterojunction bipolar transistor
Assignee: Mitsubishi Electric Corp
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Filing: 1988-08-23
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Granted: 1990-01-23
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Expires: 2008-08-23
Abstract
Abstract In the inventive heterojunction bipolar transistor and method of manufacturing the same, a semi-insulation layer and an external base layer sequentially epitaxially grown on a collector layer are selectively mesa-etched through a mask of an insulation film provided with an opening so that the external base layer, the semi-insulation layer and the collector layer are selectively exposed, and thereafter an internal base layer and an emitter layer are selectively epitaxially grown in sequence on the exposed regions of an external base layer, the semi-insulation layer and the collector layer. An emitter electrode is formed in a self-alignment manner through the opening of the insulation film. Thus, transistor performance is improved and a precision element size is able to be obtained.
Inventors
- 👤 Yasutomo Kajikawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 04:11
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/021; H10D62/00; H10D62/80; H10D62/85; Y; Y10; Y10S; Y10S148/00; Y10S148/011; Y10S148/026; Y10S148/05
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
161 words
A heterojunction bipolar transistor comprising: a semi-insulative substrate; a first conductivity type collector layer formed on the upper part of said semi-insulative substrate; a semi-insulation layer formed on said collector layer; a second conductivity type external base layer formed on said semi-insulation layer; an insulation film formed on said external base layer and provided with an opening in a required position; a cavity obtained by mesa etching regions of said external base layer, said semi-insulating layer and said collector layer corresponding to said opening of said insulation film being utilized as a mask; a second conductivity type internal base layer formed only on exposed said regions of said external base layer, said semi-insulation layer and said collector layer only in said cavity; a first conductivity type emitter layer formed on said internal base layer in said cavity; and an emitter electrode formed in a self-alignment manner through said opening of said insulation film to be electrically connected with said emitter layer.
Claim 2
Dependent Claim
161 words
A heterojunction bipolar transistor comprising: a semi-insulative substrate; a first conductivity type collector layer formed on the upper part of said semi-insulative substrate; a semi-insulation layer formed on said collector layer; a second conductivity type external base layer formed on said semi-insulation layer; an insulation film formed on said external base layer and provided with an opening in a required position; a cavity obtained by mesa etching regions of said external base layer, said semi-insulating layer and said collector layer corresponding to said opening of said insulation film being utilized as a mask; a second conductivity type internal base layer formed only on exposed said regions of said external base layer, said semi-insulation layer and said collector layer only in said cavity; a first conductivity type emitter layer formed on said internal base layer in said cavity; and an emitter electrode formed in a self-alignment manner through said opening of said insulation film to be electrically connected with said emitter layer.
Claim 3
Dependent Claim
27 words
A heterojunction bipolar transistor in accordance with claim 1, wherein a first conductivity type subcollector layer is further provided between said semi-insulative substrate and said collector layer.
Claim 4
Dependent Claim
10 words
A heterojunction bipolar transistor in accordance with claim 1, wherein
Claim 5
Dependent Claim
27 words
a first conductivity type cap layer is further formed on said emitter layer in said cavity so that said emitter electrode is connected with said cap layer.
Claim 6
Dependent Claim
27 words
a first conductivity type cap layer is further formed on said emitter layer in said cavity so that said emitter electrode is connected with said cap layer.
Claim 7
Dependent Claim
35 words
A heterojunction bipolar transistor in accordance with claim 1, wherein said insulation film is provided with a through hole so that a base electrode is connected with said external base layer via said through hole.
Claim 8
Dependent Claim
42 words
A heterojunction bipolar transistor in accordance with claim 2, wherein an electrode cavity is formed from said insulation film to said subcollector layer so that a collector electrode is formed in an exposed region of said subcollector layer in said electrode cavity.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-22 | 1993-07-24 | 1994-01-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-22 | 1997-07-24 | 1998-01-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-22 | 2001-07-24 | 2002-01-23 | $7700.00 | Window Closed / Lapsed |