GaAs analog switch cell with wide linear dynamic range from DC to GHz

Claim 1

A series switching cell (FIG. 5) for selectively switching an RF signal at an input to an output, comprising: a first FET (40) having a gate electrode adapted to receive said RF signal and having a drain electrode adapted to receive an operating potential (V DD ) and a source electrode; a second FET (49) having a source to drain path in series with the gate electrode of said first FET for receiving said RF signal; a third FET (43) having a gate electrode adapted to receive a first control signal (V CONT ) for turning said third FET ON or OFF; a diode clamping means (41) coupled between the source electrode of said first FET and a drain electrode of said third FET; a fourth FET (39) having a gate electrode coupled to the gate electrode of said third FET (43) and having a source electrode coupled to a source electrode of said third FET and having a drain electrode coupled to said drain electrode of said third FET (43) via a diode (42); a fifth FET (48) having a gate electrode coupled to the drain electrode of said fourth FET (39) and having a source electrode coupled to a gate electrode of said second FET (49), with the source electrode of said fifth FET (48) coupled to a point of reference potential via a first current source (45); a sixth FET (50) having a drain electrode adapted to receive said operating potential (V dd ) and having a gate electrode coupled in series with said source to drain path of said second FET (49) to provide an output, and having a source electrode coupled to said drain electrode of said fourth FET (39) via a resistor (47); a seventh FET (53) having a drain electrode coupled to said source electrode of said sixth FET (50) and having a source electrode coupled to the source electrodes of said third and fourth FETs (43, 39) and coupled to a second current source (46); an eighth FET (52) having a gate electrode coupled to the gate electrode of said seventh FET (53) and a source electrode coupled to the source electrode of said seventh FET (53) with the gate electrode of said seventh and eight FETs (52,53) adapted to receive a control signal (V CONT ) of opposite polarity to said first control signal for turning said seventh and eight FETs ON or OFF; a ninth FET (51) having a grounded gate electrode, a drain electrode adapted to receive said operating potential and source electrode coupled to the drain electrode of said eighth FET (52) wherein said RF input signal at the gate electrodes of said first FET (40) propagates to said output of said sixth FET (50) when a first level of said first control signal is applied to said gate electrodes of said seventh and eighth FET (52 and 53) and to prevent said RF input signal from propagating when a second opposite level control signal is applied to said gate electrodes of said seventh and eighth FETs while a first level control signal is applied to said gate electrodes of said third and fourth FETs (39, 43), wherein said RF signal is selectively switched from said input to output linearly for a wide range of input RF signals.