Patent US4894694A successfully refreshed from Google Patents.
US4894694A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOSFET structure and method for making same
Assignee: Avago Technologies International Sales Pte Ltd
•
Filing: 1988-01-20
•
Granted: 1990-01-16
•
Expires: 2008-01-20
Abstract
Abstract A MOSFET structure characterized by a lightly doped tip region located between the channel and drain, and a buried region located below the tip region and shifted laterally towards the drain. The buried region, which is doped to a level intermediate between that of the tip region and the drain, causes the channel current to deflect downwardly from the field oxide, through the lightly doped tip region, and into the buried region. The gradual electric field gradient produced by the structure and the deflection of the channel current away from the thin oxide greatly reduces the device's sensitivity to the hot electron effect. The method of the invention includes forming the lightly doped tip region, forming a first oxide spacer, forming the buried region, widening the oxide spacer, and finally forming the drain region.
Inventors
- 👤 Kit M. Cham
- 👤 Paul V. Voorde
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 03:34
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D30/605; H10P; H10P76/00; H10P76/40; H10P76/408; H10P76/4085; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
138 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region; and a blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region, wherein said source region, said drain region, said tip region and said buried region are all p-type regions.
Claim 2
Dependent Claim
138 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region; and a blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region, wherein said source region, said drain region, said tip region and said buried region are all p-type regions.
Claim 3
Dependent Claim
138 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region; and a blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region, wherein said source region, said drain region, said tip region, and said buried region are all n-type regions.
Claim 4
Dependent Claim
138 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region; and a blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region, wherein said source region, said drain region, said tip region, and said buried region are all n-type regions.
Claim 5
Dependent Claim
16 words
A MOSFET structure as recited in claim 2 wherein said blocking region is an n-type region.
Claim 6
Dependent Claim
132 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region, said source, drain, tip and buried regions being n-type regions; and a substantially intrinsic blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region.
Claim 7
Dependent Claim
132 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region, said source, drain, tip and buried regions being n-type regions; and a substantially intrinsic blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region.
Claim 8
Dependent Claim
131 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region, said source, drain, tip and buried regions being n-type regions; and a p-type blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region.
Claim 9
Dependent Claim
131 words
A MOSFET structure comprising: a source region, a drain region, a channel region located between said source region and said drain region, and gate means disposed over said channel region; a tip region disposed between said channel region and said drain region, said tip region having a lower conductivity than said drain region; a buried region disposed below said tip region and shifted laterally towards said drain region relative said tip region, said buried region having a higher conductivity than said tip region but a lower conductivity than said drain region, said source, drain, tip and buried regions being n-type regions; and a p-type blocking region disposed between said tip region and said drain region and above said buried region, said blocking region having a lower conductivity than said tip region.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-01-15 | 1993-07-17 | 1994-01-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-01-15 | 1997-07-17 | 1998-01-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-01-15 | 2001-07-17 | 2002-01-16 | $7700.00 | Window Closed / Lapsed |