Package for mounting a semiconductor chip of ultra-high frequency

Claim 2

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: an insulation layer on which input and output conductive patterns are formed, said insulating layer having a lower surface; a ground layer provided on the lower surface of said insulation layer; and adjusting means including electrical conductive material provided in said insulation layer in the vicinity of said conductive patterns for adjusting the characteristic impedance of said conductive patterns, said adjusting means comprising a conductive metallized layer and at least one via hole filled with said electrical conductive material connected to said metallized layer and said ground layer.

Claim 3

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: a first insulation layer on which input and output conductive patterns are formed; a second insulation layer formed on said first insulation layer; said first and second insulation layers each having upper and lower surfaces; a first ground layer provided on the lower surface of said first insulation layer; a second ground layer provided on the upper surface of said second insulation layer; and adjusting means including electrical conductive material provided in said first and second insulation layers, respectively, and in the vicinity of said conductive patterns for adjusting the characteristic impedance of said conductive patterns; said adjusting means comprising metallized layers provided in said first and second insulation layers, respectively, and via holes filled with said electrical conductive material provided in said first and second insulation layers, respectively, connected to said metallized layers in said first and second insulation layers, respectively, and also connected to ground layers provided on said upper and lower surfaces of said first and second insulation layers, respectively.

Claim 4

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: a first insulation layer on which input and output conductive patterns are formed; a second insulation layer formed on said first insulation layer; said first and second insulation layers each having upper and lower surfaces; a first ground layer provided on the lower surface of said first insulation layer; a second ground layer provided on the upper surface of said second insulation layer; and adjusting means including electrical conductive material provided in said first and second insulation layers, respectively, and in the vicinity of said conductive patterns for adjusting the characteristic impedance of said conductive patterns; said adjusting means comprising metallized layers provided in said first and second insulation layers, respectively, and via holes filled with said electrical conductive material provided in said first and second insulation layers, respectively, connected to said metallized layers in said first and second insulation layers, respectively, and also connected to ground layers provided on said upper and lower surfaces of said first and second insulation layers, respectively.

Claim 5

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: an insulation layer on which input and output conductive patterns are formed, each said pattern comprising an inner lead for connecting to said chip, an outer lead for connecting to an outside lead lines, and a portion for connecting said inner lead to said outer lead; and adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of, at least, said inner leads of the conductive patterns for adjusting the characteristic impedance of said conductive pattern; said adjusting means comprising a metallized layer provided in said insulation layer and via holes filled with said electrical conductive material provided in said insulation layer, said via holes extending vertically downward from an upper surface of said insulation layer to said metallized layer.

Claim 6

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: an insulation layer on which input and output conductive patterns are formed, each said pattern comprising an inner lead for connecting to said chip, an outer lead for connecting to an outside lead lines, and a portion for connecting said inner lead to said outer lead; and adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of, at least, said inner leads of the conductive patterns for adjusting the characteristic impedance of said conductive pattern; said adjusting means comprising a metallized layer provided in said insulation layer and via holes filled with said electrical conductive material provided in said insulation layer, said via holes extending vertically downward from an upper surface of said insulation layer to said metallized layer.

Claim 7

A package as set forth in claim 3 wherein said plurality of via holes are arranged along a substantially entire length of said conductive patterns in such a manner that each via hole extends vertically downward from an upper surface of said insulation layer at a position just below said conductive pattern.

Claim 8

A package as set forth in claim 3, wherein said plurality of via holes are arranged along said inner leads of said conductive patterns in such a manner that each via hole extends vertically downward from an upper surface of said insulation layer at a position just below said conductive pattern.

Claim 9

A package as set forth in claim 3, wherein said via holes extend vertically downward from an upper surface of said insulation layer at positions between said adjacent conductive patterns.

Claim 10

A package as set forth in claim 6, wherein said via holes extend downwardly from the upper surface of said insulation layer at positions between said adjacent inner leads of the conductive patterns.

Claim 11

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultrahigh frequency, comprising: an insulation layer on which input and output conductive patterns are formed, a part of each said pattern extending through said insulation layer; adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of said conductive patterns for adjusting the characteristic impedance of said conductive patterns; and, said adjusting means comprising a metallized layer having openings, so that said part of each pattern passes through said opening.

Claim 12

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultrahigh frequency, comprising: an insulation layer on which input and output conductive patterns are formed, a part of each said pattern extending through said insulation layer; adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of said conductive patterns for adjusting the characteristic impedance of said conductive patterns; and, said adjusting means comprising a metallized layer having openings, so that said part of each pattern passes through said opening.

Claim 13

A package as set forth in claim 8, wherein said adjusting means comprising a plurality of ring-shaped metallized layers, so that said part of each pattern passes through said opening of said ring-shaped metallized layer.

Claim 14

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: an insulation layer on which input and output conductive patterns are formed, each said pattern comprising an inner lead for connecting to said chip, an outer lead for connecting to an outside lead line, and a portion for connecting said inner lead to said outer lead; and adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of, at least, said inner leads of the conductive patterns for adjusting the characteristic impedance of said conductive pattern; said adjusting means comprising a metallized layer provided in said insulation layer and via holes filled with said electrical conductive material provided in said insulation layer, said via holes extending vertically downward from an upper surface of said insulation layer at a position just below said conductive patterns to said metallized layer and being arranged along substantially the entire length of said conductive patterns.

Claim 15

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: an insulation layer on which input and output conductive patterns are formed, each said pattern comprising an inner lead for connecting to said chip, an outer lead for connecting to an outside lead line, and a portion for connecting said inner lead to said outer lead; and adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of, at least, said inner leads of the conductive patterns for adjusting the characteristic impedance of said conductive pattern; said adjusting means comprising a metallized layer provided in said insulation layer and via holes filled with said electrical conductive material provided in said insulation layer, said via holes extending vertically downward from an upper surface of said insulation layer at a position just below said conductive patterns to said metallized layer and being arranged along substantially the entire length of said conductive patterns.

Claim 16

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: an insulation layer on which input and output conductive patterns are formed, each said pattern comprising an inner lead for connecting to said chip, an outer lead for connecting to an outside lead line, and a portion for connecting said inner lead to said outer lead; and adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of, at least, said inner leads of the conductive patterns for adjusting the characteristic impedance of said conductive pattern; said adjusting means comprising a metallized layer provided in said insulation layer and via holes filled with said electrical conductive material provided in said insulation layer, said via holes extending vertically downward from an upper surface of said insulation layer at a position just below said conductive pattern to said metallized layer and being arranged along said inner leads of said conductive patterns.

Claim 17

A package for mounting thereon a chip, such as a semiconductor chip, which can operate in a range of ultra-high frequency, comprising: an insulation layer on which input and output conductive patterns are formed, each said pattern comprising an inner lead for connecting to said chip, an outer lead for connecting to an outside lead line, and a portion for connecting said inner lead to said outer lead; and adjusting means including electrical conductive material provided in said insulation layer and in the vicinity of, at least, said inner leads of the conductive patterns for adjusting the characteristic impedance of said conductive pattern; said adjusting means comprising a metallized layer provided in said insulation layer and via holes filled with said electrical conductive material provided in said insulation layer, said via holes extending vertically downward from an upper surface of said insulation layer at a position just below said conductive pattern to said metallized layer and being arranged along said inner leads of said conductive patterns.