High capacitance trench capacitor and well extension process

Claim 2

A process for making trench devices in a semiconductor substrate comprising: forming a well of a first conductivity type in a face of the semiconductor substrate, the well having a bottom; forming a plurality of trenches within the well, the trenches extending down into the well from the substrate face, each trench having a plurality of interior surfaces, one of which is a bottom surface shallower than the bottom of the well, defining an interior space; forming a region of extra doping of the first conductivity type extending from each of the trenches outward into the well; and forming a doped trench face extending over the interior surfaces of each trench, the trench face being doped with an impurity of a second conductivity type; and forming a thin dielectric layer over the interior surfaces of the trench.

Claim 3

A process for high capacitance trench capacitors in a semiconductor substrate comprising: forming in a face of the semiconductor substrate at least one well of a first conductivity type, the well having a bottom; forming a plurality of trenches within the well, the trenches extending down into the well from the substrate face, each trench having a plurality of interior surfaces, including a bottom surface shallower than the bottom of the well, defining an interior space; performing the following two doping formation steps in any order: forming a region of extra doping of the first conductivity type extending from each of the trenches outward into the well; and forming a doped trench face extending over the interior surfaces of each trench, the trench face being doped with an impurity of a second conductivity type; and forming a thin dielectric layer over the trench interior surfaces that contain dopant of the second conductivity type; and filling the interior space of each trench remaining after thin dielectric layer formation, with a plug of conductive semiconductor material.

Claim 4

A process for high capacitance trench capacitors in a semiconductor substrate comprising: forming in a face of the semiconductor substrate at least one well of a first conductivity type, the well having a bottom; forming a plurality of trenches within the well, the trenches extending down into the well from the substrate face, each trench having a plurality of interior surfaces, including a bottom surface shallower than the bottom of the well, defining an interior space; performing the following two doping formation steps in any order: forming a region of extra doping of the first conductivity type extending from each of the trenches outward into the well; and forming a doped trench face extending over the interior surfaces of each trench, the trench face being doped with an impurity of a second conductivity type; and forming a thin dielectric layer over the trench interior surfaces that contain dopant of the second conductivity type; and filling the interior space of each trench remaining after thin dielectric layer formation, with a plug of conductive semiconductor material.

Claim 5

The process of claim 2 in which the first conductivity type is n-type and the impurity of the first conductivity type is provided by phosphorus.

Claim 6

The process of claim 2 in which the second conductivity type is p-type and the impurity of the second conductivity type is boron.

Claim 7

The process of claim 2 wherein the formation of the region of extra doping of the first conductivity type is conducted by the process comprising: inserting into the trenches a first dopant carrying material having a quantity of dopant of the first conductivity type; distributing the dopant from the dopant carrying material into the trench interior surfaces to form a region of extra doping of the first conductivity type extending from each of the trenches outward into the well; and removing the first dopant carrying material from the trenches.

Claim 8

The process of claim 5 wherein the dopant in the first dopant carrying material is phosphorus.

Claim 9

The process of claim 5 wherein the dopant carrying material is a phosphosilicate glass.

Claim 10

The process of claim 5 wherein the dopant carrying material is a gas.

Claim 11

The process of claim 5 wherein the dopant is diffused further in an additional annealing step after the dopant carrying material is removed.

Claim 12

The process of claim 2 wherein the formation of the doped trench face extending over the interior surfaces of each trench is conducted by the process comprising: inserting into the trenches a second dopant carrying material having a quantity of dopant of the second conductivity type; distributing the dopant from the second dopant carrying material into the trench interior surfaces to form a doped trench face of the second conductivity type extending from each of the trenches outward into the well a distance not as great as the region of extra doping of the first conductivity type extending from each of the trenches outward into the well; and removing the second dopant carrying material from the trenches.

Claim 13

The process of claim 10 in which the dopant of the second conductivity type is boron.

Claim 14

The process of claim 10 in which the second dopant carrying material is borosilicate glass.

Claim 15

The process of claim 10 in which the second dopant carrying material is a gas.

Claim 16

A process for high capacitance trench capacitors in a semiconductor substrate comprising: forming in a face of the semiconductor substrate at least one well of n-conductivity type, the well having a bottom; forming a plurality of trenches within the well, the trenches extending down into the well from the substrate face, each trench having a plurality of interior surfaces, one of which is a bottom surface shallower than the bottom of the well, defining an interior space; depositing on the interior surfaces of the trenches a layer of phosphosilicate glass; diffusing the phosphorus from the phosphosilicate glass into the trench interior surfaces to form a region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; removing the phosphosilicate glass from the trenches; depositing on the interior surfaces of the trenches a layer of borosilicate glass; diffusing the boron from the borosilicate glass into the trench interior surfaces to form a doped trench face of p-conductivity type extending from each of the trenches outward into the well a distance not as great as the region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; removing the borosilicate glass from the trenches; and filling the remaining interior space of each trench with a plug of polycrystalline silicon.

Claim 17

A process for high capacitance trench capacitors in a semiconductor substrate comprising: forming in a face of the semiconductor substrate at least one well of n-conductivity type, the well having a bottom; forming a plurality of trenches within the well, the trenches extending down into the well from the substrate face, each trench having a plurality of interior surfaces, one of which is a bottom surface shallower than the bottom of the well, defining an interior space; depositing on the interior surfaces of the trenches a layer of phosphosilicate glass; diffusing the phosphorus from the phosphosilicate glass into the trench interior surfaces to form a region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; removing the phosphosilicate glass from the trenches; depositing on the interior surfaces of the trenches a layer of borosilicate glass; diffusing the boron from the borosilicate glass into the trench interior surfaces to form a doped trench face of p-conductivity type extending from each of the trenches outward into the well a distance not as great as the region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; removing the borosilicate glass from the trenches; and filling the remaining interior space of each trench with a plug of polycrystalline silicon.

Claim 18

The process of claim 14 wherein the phosphorus is diffused further in an additional annealing step after the phosphosilicate glass is removed.

Claim 19

A process for high capacitance trench capacitors in a semiconductor substrate comprising: forming in a face of the semiconductor substrate at least one well of n-conductivity type, the well having a bottom; forming a plurality of trenches within the well, the trenches extending down into the well from the substrate face, each trench having a plurality of interior surfaces, one of which is a bottom surface shallower than the bottom of the well, defining an interior space; forming a region of extra doping of n-conductivity type extending from each of the trenches outward into the well by the process comprising: inserting into the trenches a layer of phosphosilicate glass; diffusing the phosphorus from the phosphosilicate glass into the trench interior surfaces to form a region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; and removing the layer of phosphosilicate glass from the trenches; forming a doped trench face extending over the interior surfaces of each trench, the trench face being doped with an impurity of p-conductivity type, by the process comprising: inserting into the trenches a layer of borosilicate glass; diffusing the boron from the borosilicate glass into the trench interior surfaces to form a doped trench face of the p-conductivity type extending from each of the trenches outward into the well a distance not as great as the region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; and removing the layer of borosilicate glass from the trenches; coating the interior surfaces of each trench with a thin dielectric layer; and filling the interior space of each trench remaining after thin dielectric formation, with a plug of polycrystalline silicon material.

Claim 20

A process for high capacitance trench capacitors in a semiconductor substrate comprising: forming in a face of the semiconductor substrate at least one well of n-conductivity type, the well having a bottom; forming a plurality of trenches within the well, the trenches extending down into the well from the substrate face, each trench having a plurality of interior surfaces, one of which is a bottom surface shallower than the bottom of the well, defining an interior space; forming a region of extra doping of n-conductivity type extending from each of the trenches outward into the well by the process comprising: inserting into the trenches a layer of phosphosilicate glass; diffusing the phosphorus from the phosphosilicate glass into the trench interior surfaces to form a region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; and removing the layer of phosphosilicate glass from the trenches; forming a doped trench face extending over the interior surfaces of each trench, the trench face being doped with an impurity of p-conductivity type, by the process comprising: inserting into the trenches a layer of borosilicate glass; diffusing the boron from the borosilicate glass into the trench interior surfaces to form a doped trench face of the p-conductivity type extending from each of the trenches outward into the well a distance not as great as the region of extra doping of the n-conductivity type extending from each of the trenches outward into the well; and removing the layer of borosilicate glass from the trenches; coating the interior surfaces of each trench with a thin dielectric layer; and filling the interior space of each trench remaining after thin dielectric formation, with a plug of polycrystalline silicon material.

Claim 21

The process of claim 16 wherein the phosphorus is diffused further in an additional annealing step after the phosphosilicate glass is removed.