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US4888582A
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US
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Apparatus for storing multi-bit pixel data
Assignee: Tektronix Inc
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Filing: 1988-02-12
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Granted: 1989-12-19
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Expires: 2008-02-12
Abstract
Abstract An apparatus for storing multi-bit pixel data comprises a random access memory, for storing a plurality of pixels at each addressable memory location, the memory having one write enable and one data input for each bit of each pixel at a currently addressed memory location. Means are provided to couple each line of a data bus to the write enable inputs associated with corresponding bits of each addressed pixel and to place a common bit, in a selected state, on every data input assosciated with a corresponding bit of each currently addressed pixel, thereby permitting a processor to rewrite the addressed pixels with a selected pixel value, provided the write enables of each pixel are activated by an appropriate bit on the associated data bus line, and thereby permitting a processor to write pixel data to the memory using only one bit per pixel on the data bus. The apparatus also comprises means to generate a data word, each bit in said data word corresponding to one pixel at the currently addressed memory location, the state of each bit depending on whether the corresponding pixel state meets selected criteria, the data word being selectively applied to the data bus.
Inventors
- 👤 Charles B. Schnarel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:13
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/02; G09G5/022; G09G5/36; G09G5/39; G09G5/393
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
154 words
An apparatus for storing multi-bit pixel data comprising: a random access memory, a plurality of pixels being stored at each addressable memory location, said memory having one write enable input and one data input corresponding to each bit of each pixel at a currently addressed memory location, a data bus, means to selectively couple every line of the data bus either to a write enable input, associated with corresponding bits of every pixel at the currently addressed memory location, or to a data input, associated with corresponding bits of every pixel at the currently addressed memory location, register means for storing at least one bit for each pixel having a separate register data output line associated with each register bit, and means to selectively couple the data inputs associated with corresponding bits of every pixel at the currently addressed memory location to either one register data output line or to one data bus line.
Claim 2
Independent Claim
154 words
An apparatus for storing multi-bit pixel data comprising: a random access memory, a plurality of pixels being stored at each addressable memory location, said memory having one write enable input and one data input corresponding to each bit of each pixel at a currently addressed memory location, a data bus, means to selectively couple every line of the data bus either to a write enable input, associated with corresponding bits of every pixel at the currently addressed memory location, or to a data input, associated with corresponding bits of every pixel at the currently addressed memory location, register means for storing at least one bit for each pixel having a separate register data output line associated with each register bit, and means to selectively couple the data inputs associated with corresponding bits of every pixel at the currently addressed memory location to either one register data output line or to one data bus line.
Claim 3
Independent Claim
71 words
An apparatus comprising: a memory for storing sets of multi-bit pixel color data at addressable locations; and means coupled to access the memory for changing selected sets of the multi-bit pixel color data to single-bit data, thereby compressing the selected multi-bit data, each selected set of the multi-bit data being changed to a single-bit data of one or zero, according to the selected data being within or outside predetermined numerical limits.
Claim 4
Independent Claim
71 words
An apparatus comprising: a memory for storing sets of multi-bit pixel color data at addressable locations; and means coupled to access the memory for changing selected sets of the multi-bit pixel color data to single-bit data, thereby compressing the selected multi-bit data, each selected set of the multi-bit data being changed to a single-bit data of one or zero, according to the selected data being within or outside predetermined numerical limits.
Claim 5
Dependent Claim
45 words
An apparatus as in claim 2 wherein said means includes: a pair of registers for storing the predetermined numerical limits as color values, and means for comparing each selected set of multi-bit color data to the predetermined numerical limits and producing a single-bit data value.
Claim 6
Dependent Claim
21 words
An apparatus as in claim 3 further including a means for selecting multi-bit data for changing according to predetermined masking criteria.
Claim 7
Independent Claim
100 words
An apparatus comprising: a memory for storing sets of multi-bit data at addressable locations, each multi-bit set representing the color of a pixel; and means coupled to the memory and responsive to applied single-bit data for changing selected sets of the stored data, corresponding to selected bits of the single-bit data, to sets of predetermined multi-bit color values, according to the selected bits being one or zero, thereby expanding selected single-bit data to predetermined multi-bit color values; selected stored data are changed when the corresponding selected bit is a first value, and not changed when it is a second value.
Claim 8
Independent Claim
100 words
An apparatus comprising: a memory for storing sets of multi-bit data at addressable locations, each multi-bit set representing the color of a pixel; and means coupled to the memory and responsive to applied single-bit data for changing selected sets of the stored data, corresponding to selected bits of the single-bit data, to sets of predetermined multi-bit color values, according to the selected bits being one or zero, thereby expanding selected single-bit data to predetermined multi-bit color values; selected stored data are changed when the corresponding selected bit is a first value, and not changed when it is a second value.
Claim 9
Dependent Claim
17 words
The apparatus of claim 5 wherein said means includes a register for storing the predetermined multi-bit data.
Claim 10
Dependent Claim
45 words
The apparatus of claim 6 wherein said means further includes a write enable means responsive to the single-bit data for addressing selected memory locations, and a making means for masking selected bits of the changed multi-bit color data for storage at the selected memory locations.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-12-18 | 1993-06-19 | 1993-12-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-12-18 | 1997-06-19 | 1997-12-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-12-18 | 2001-06-19 | 2001-12-19 | $7700.00 | Window Closed / Lapsed |