Patent US4885547A successfully refreshed from Google Patents.
US4885547A
Expired / Lapsed
US
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Gain cell with digital control
Assignee: St Clair Intellectual Property Consultants Inc
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Filing: 1988-07-07
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Granted: 1989-12-05
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Expires: 2008-07-07
Abstract
Abstract A differential amplifier in the form of a Gilbert gain cell is controlled by a pair of input currents applied to a pair of differentially coupled transistor pairs. A digital signal is generated and input into a CMOS digital-to-analog converter (DAC). The DAC outputs a pair of currents on conductors which are maintained at virtual ground by the use of a current mirror and an operational amplifier. The control signals applied to the differentially coupled transistor pairs are generated as base currents of transistors conducting the DAC output currents.
Inventors
- 👤 Marshall J. Bell, Jr.
- 👤 Daniel S. Draper
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 12:59
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/001; H03G1/00; H03G1/0005; H03G1/0017; H03G1/0023
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
86 words
A controller for a Gilbert multiplier circuit responsive to first and second control signals for generating first and second output signals, respectively; said controller comprising: means for generating a digital signal representative of a desired relationship between the first and second output signals; and means coupled to the Gilbert multiplier circuit for converting the digital signal into the first and second control signals such that the desired relationship between the first and second output signals results from applying the control signals to the Gilbert multiplier circuit.
Claim 2
Dependent Claim
86 words
A controller for a Gilbert multiplier circuit responsive to first and second control signals for generating first and second output signals, respectively; said controller comprising: means for generating a digital signal representative of a desired relationship between the first and second output signals; and means coupled to the Gilbert multiplier circuit for converting the digital signal into the first and second control signals such that the desired relationship between the first and second output signals results from applying the control signals to the Gilbert multiplier circuit.
Claim 3
Dependent Claim
24 words
A controller according to claim 1 wherein said converting means comprises DAC means for converting the digital signal into a pair of analog signals.
Claim 4
Dependent Claim
46 words
A controller according to claim 2 wherein said DAC means includes means for providing the analog signals as currents on a pair of conductors, with the sum of the currents being a constant and the relative magnitudes of the currents being determined by the digital signal.
Claim 5
Dependent Claim
28 words
A controller according to claim 3 wherein said converting means further comprises means for maintaining the voltages of the conductors carrying the analog signals at a common level.
Claim 6
Dependent Claim
75 words
A controller according to claim 4 wherein the common voltage level of the conductors is at virtual ground, and said maintaining means comprises first and second transistor means the bases of which are connected, a conducting terminal of said first transistor means being connected to ground, a conducting terminal of said second transistor means being connected to one of said conductors, and both of said transistor means being driven with currents of the same value.
Claim 7
Dependent Claim
47 words
A controller according to claim 5 wherein the signal on the bases of said first and second transistor means forms one of the control signals and are also coupled to ground through diode means to prevent said transistor means from taking a state of zero current conduction.
Claim 8
Dependent Claim
76 words
A controller according to claim 6 wherein said maintaining means further comprises third transistor means coupled between a power supply and the other of said conductors, and operational amplifier means having two input terminals, each coupled to a different one of said conductors, the output of said operational amplifier means being coupled to the base of said third transistor means, with the signal one the base of said third transistor means forming the other control signal.
Claim 9
Dependent Claim
90 words
A controllable Gilbert multiplier circuit comprising: a Gilbert multiplier circuit responsive to first and second control signals for generating from an input signal first and second output signals, respectively; means for generating a digital signal representative of a desired relationship between the first and second output signals; and means coupled to the Gilbert multiplier circuit for converting the digital signal into the first and second control signals such that the desired relationship between the first and second output signals results from applying the control signals to said Gilbert multiplier circuit.
Claim 10
Dependent Claim
90 words
A controllable Gilbert multiplier circuit comprising: a Gilbert multiplier circuit responsive to first and second control signals for generating from an input signal first and second output signals, respectively; means for generating a digital signal representative of a desired relationship between the first and second output signals; and means coupled to the Gilbert multiplier circuit for converting the digital signal into the first and second control signals such that the desired relationship between the first and second output signals results from applying the control signals to said Gilbert multiplier circuit.
Claim 11
Dependent Claim
27 words
A controllable Gilbert multiplier circuit according to claim 8 wherein said converting means comprises DAC means for converting the digital signal into a pair of analog signals.
Claim 12
Dependent Claim
64 words
A controllable Gilbert multiplier circuit according to claim 9 wherein said Gilbert multiplier circuit generates output signals representative of the currents on the control signals, said DAC means including means for providing the analog signals as currents on a pair of conductors, with the sum of the currents being a constant and the relative magnitudes of the currents being determined by the digital signal.
Claim 13
Dependent Claim
31 words
A controllable Gilbert multiplier circuit according to claim 10 wherein said converting means further comprises means for maintaining the voltages of said conductors carrying the analog signals at a common level.
Claim 14
Dependent Claim
78 words
A controllable Gilbert multiplier circuit according to claim 11 wherein the common voltage level of said conductors is at virtual ground, and said maintaining means comprises first and second transistor means the bases of which are connected, a conducting terminal of said first transistor means being connect to ground, a conducting terminal of said second transistor means being connected to one of said conductors, and both of said transistor means being driven with currents of the same value.
Claim 15
Dependent Claim
50 words
A controllable Gilbert multiplier circuit according to claim 12 wherein the signal on the bases of said first and second transistor means forms one of the control signals and are also coupled to ground through diode means to prevent said transistor means from taking a state of zero current conduction.
Claim 16
Dependent Claim
80 words
A controllable Gilbert multiplier circuit according to claim 13 wherein said maintaining means further comprises a third transistor means coupled between a power supply and the other of said conductors, and operational amplifier means having two input terminals, each coupled to a different one of said conductors, the output of said operational amplifier means being coupled to the base of said third transistor means, with the signal on the base of said third transistor means forming the other control signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-12-04 | 1993-06-05 | 1993-12-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-12-04 | 1997-06-05 | 1997-12-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-12-04 | 2001-06-05 | 2001-12-05 | $7700.00 | Window Closed / Lapsed |