← Back to Patent Explorer
US4884124A Expired / Lapsed US ⏱️ 0.0 years remaining

Resin-encapsulated semiconductor device

Assignee: Mitsubishi Electric Corp
•
Filing: 1987-08-17
•
Granted: 1989-11-28
•
Expires: 2007-08-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device comprises a semiconductor element which is bonded to a flat base and encapsulated in a resin. The base has a bonding section at its center to which the semiconductor element is bonded, the area of the bonding section being smaller than that of the bottom surface of the semiconductor element. The portion of the base outside the bonding section has a plurality of through holes or depressions formed in its top and bottom surfaces which increase the adhesion between the resin and the base. The bonding section may be substantially separated from the remainder of the base by elongated through holes or depressions which substantially surround the bonding section.

Inventors

  • 👤 Ryuichiro Mori
  • 👤 Tatsuhiko Akiyama
  • 👤 Katsuyuki Fukudome

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 23:23
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W74/00; H10W74/10; H10W74/111; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07352; H10W72/30; H10W72/321; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 125 words
A packaged semiconductor device comprising: a semiconductor element having opposed first and second sides; a flat base having opposed top and bottom sides including a centrally disposed bonding portion on said top side defined by and substantially surrounded by a plurality of elongated recesses in said top side extending only partly through said base toward said bottom side for confining a bonding material to said bonding portion, said bonding portion having a smaller area than said second side and said top side; a bonding material, disposed on said second side and on said top side confined to said centrally disposed bonding portion, bonding said semiconductor element to said base only at said centrally disposed portion; and a resin encapsulating said semiconductor element and said base.
Claim 2
Dependent Claim 125 words
A packaged semiconductor device comprising: a semiconductor element having opposed first and second sides; a flat base having opposed top and bottom sides including a centrally disposed bonding portion on said top side defined by and substantially surrounded by a plurality of elongated recesses in said top side extending only partly through said base toward said bottom side for confining a bonding material to said bonding portion, said bonding portion having a smaller area than said second side and said top side; a bonding material, disposed on said second side and on said top side confined to said centrally disposed bonding portion, bonding said semiconductor element to said base only at said centrally disposed portion; and a resin encapsulating said semiconductor element and said base.
Claim 3
Dependent Claim 28 words
The packaged semiconductor device of claim 1 wherein said base includes a plurality of holes disposed outside said bonding portion extending through said base to said bottom side.
Claim 4
Dependent Claim 27 words
The packaged semiconductor device of claim 1 wherein said resin has substantially the same thickness opposite each of said first and second sides of said semiconductor element.
Claim 5
Dependent Claim 35 words
The packaged semiconductor device of claim 1 wherein said base includes a plurality of recesses in said top side extending only partly through said base toward said bottom side and disposed outside said bonding portion.
Claim 6
Dependent Claim 124 words
A packaged semiconductor device comprising: a semiconductor element having opposed first and second sides; a flat base having opposed top and bottom sides including a centrally disposed bonding portion on said top side defined by and substantially surrounded by a plurality of elongated holes in said top side extending through said base to said bottom side for confining a bonding material to said bonding portion, said bonding portion having a smaller area than said second side and said top side; a bonding material, disposed on said second side and on said top side confined to said centrally disposed bonding portion, bonding said semiconductor element to said base only at said centrally disposed bonding portion; and a resin encapsulating said semiconductor element and said base.
Claim 7
Dependent Claim 124 words
A packaged semiconductor device comprising: a semiconductor element having opposed first and second sides; a flat base having opposed top and bottom sides including a centrally disposed bonding portion on said top side defined by and substantially surrounded by a plurality of elongated holes in said top side extending through said base to said bottom side for confining a bonding material to said bonding portion, said bonding portion having a smaller area than said second side and said top side; a bonding material, disposed on said second side and on said top side confined to said centrally disposed bonding portion, bonding said semiconductor element to said base only at said centrally disposed bonding portion; and a resin encapsulating said semiconductor element and said base.
Claim 8
Dependent Claim 30 words
The packaged semiconductor device of claim 5 wherein said base includes a plurality of recesses disposed outside said bonding portion extending only partly through said base toward said bottom side.
Claim 9
Dependent Claim 28 words
The packaged semiconductor device of claim 5 wherein said base includes a plurality of holes disposed outside said bonding portion extending through said base to said bottom side.
Claim 10
Dependent Claim 27 words
The packaged semiconductor device of claim 5 wherein said resin has substantially the same thickness opposite each of said first and second sides of said semiconductor element.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-11-27 1993-05-29 1993-11-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-11-27 1997-05-29 1997-11-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-11-27 2001-05-29 2001-11-28 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag