Counter circuit provided with means for reading out counted data by read-command signal applied asynchronously with clock signals to be counted

Claim 1

A positional information input circuit comprising: a rotary encoder for generating two kinds of pulse signals representative of positional information; a counting signal generation circuit coupled to said rotary encoder and generating an up-counting signal or a down-counting signal in response to said two kinds of pulse signals; an up-down counter executing up-counting and down-counting in response to said up-counting signal and said down-counting signal, respectively; a processor generating a read-command signal to read a counted value of said up-down counter into said processor; a read-command signal inhibiting circuit receiving said read-command signal from said processor and generating a controlled read-command signal; a plurality of latch circuits coupled to respective stages of said up-down counter and enabled when said controlled read-command signal is applied thereto; a first applying means coupled to said read-command signal inhibiting a circuit and said latch circuits for applying said controlled read-command signal to said latch circuits; and a second applying means coupled to said counting signal generation circuit, said up-down counter and said read-command signal inhibiting circuit for applying said up-counting signal and said down-counting signal to both said up-down counter and said read-command signal inhibiting circuit; said read-command signal inhibiting circuit inhibiting said read-command signal, when at least one of said up-counting signal and down-counting signal was applied to said read-command signal inhibiting circuit, until said up-down counter terminates an execution of the up-counting or down-counting in response to the same up-counting or down-counting signal which has been applied to said read-command signal inhibiting circuit and thereafter generating said controlled read-command signal.