Abstract Output circuitry for a digital instrument includes a counter providing a binary coded digital number which represents a measured value of an electrical parameter and which is periodically updated. The binary coded number in the counter is transferred to an output store in response to periodic transfer pulses. Control means are provided to reduce flicker in a digital display driven from the store by preventing the transfer of the least significant digit of the digital number from the counter to the store in response to a transfer pulse if such digit represents a transition between oddness and evenness when compared with the corresponding digit of the number at the time of the immediately preceding transfer pulse. In a preferred embodiment, the control means is also operative to prevent the transfer of the entire digital number to the store in response to a transfer pulse if the least significant digit is ''''ZERO'''' or ''''NINE'''' and the transfer of the least significant digit is prevented.
Output circuitry for a digital instrument, including: means providing an output in the form of a binary coded digital number which is periodically updated; a store to which the binary coded number is transferred in response to a transfer pulse; and control means operative to prevent the transfer of the least significant digit of the digital number to the store in response to a transfer pulse if such digit represents a transition between oddness and evenness when compared with the corresponding digit of the digital number at the time of the immediately preceding transfer pulse.
Claim 2
Dependent Claim
95 words
Output circuitry for a digital instrument, including: means providing an output in the form of a binary coded digital number which is periodically updated; a store to which the binary coded number is transferred in response to a transfer pulse; and control means operative to prevent the transfer of the least significant digit of the digital number to the store in response to a transfer pulse if such digit represents a transition between oddness and evenness when compared with the corresponding digit of the digital number at the time of the immediately preceding transfer pulse.
Claim 3
Dependent Claim
103 words
Output circuitry for a digital instrument, including: a counter for providing a binary coded digital number representing a measured value of an electrical parameter; a store to which the binary coded number in the counter is transferred in response to a transfer pulse; and control means operative to prevent the transfer of the least significant digit of the digital number from the counter to the store in response to a transfer pulse if such digit represents a transition between oddness and evenness when compared with the corresponding digit of the number in the counter at the time of the immediately preceding transfer pulse.
Claim 4
Dependent Claim
103 words
Output circuitry for a digital instrument, including: a counter for providing a binary coded digital number representing a measured value of an electrical parameter; a store to which the binary coded number in the counter is transferred in response to a transfer pulse; and control means operative to prevent the transfer of the least significant digit of the digital number from the counter to the store in response to a transfer pulse if such digit represents a transition between oddness and evenness when compared with the corresponding digit of the number in the counter at the time of the immediately preceding transfer pulse.
Claim 5
Dependent Claim
55 words
Output circuitry as claimed in claim 1, wherein the control means is operative to prevent the transfer of the next more significant digit of the digital number to the store in response to a transfer pulse if the least significant digit is ZERO or NINE and the transfer of the least significant digit is prevented.
Claim 6
Dependent Claim
53 words
Output circuitry as claimed in claim 1, wherein the control means is operative to prevent the transfer of all the digits of the digital number to the store in response to a transfer pulse if the least significant digit is ZERO or NINE and the transfer of the least significant digit is prevented.