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Method of controlling the order-disorder state in a semiconductor device

Assignee: Agere Systems LLC
•
Filing: 1989-03-28
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Granted: 1989-11-07
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Expires: 2009-03-28
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Abstract

Abstract An ordered-disordered transition is observed in semiconductor alloys which enables either the ordered or disordered structure to be produced.

Inventors

  • 👤 John C. Bean
  • 👤 Abbas Ourmazd

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 14:10
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; H; H10; H10D; H10D30/00; H10D30/80; H10D30/801; H10D62/00; H10D62/80; H10D62/81; H10D62/815; H10D62/8161; H10D62/8162; H10D62/8164; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/18

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 75 words
In the manufacture or use of a semiconductor device, a method for ordering at least a disordered portion of at least one semiconductor-alloy epitaxial layer comprising Ge x Si 1-x , x greater than or equal to 0.0 and less than or equal to 1.0, said method comprising a step of heating said portion to a temperature which lies below a critical temperature, said heating being applied as said layer is in a strained state.
Claim 2
Dependent Claim 75 words
In the manufacture or use of a semiconductor device, a method for ordering at least a disordered portion of at least one semiconductor-alloy epitaxial layer comprising Ge x Si 1-x , x greater than or equal to 0.0 and less than or equal to 1.0, said method comprising a step of heating said portion to a temperature which lies below a critical temperature, said heating being applied as said layer is in a strained state.
Claim 3
Dependent Claim 102 words
In the manufacture or use of a semiconductor device, a method for disordering at least an ordered portion of at least one semiconductor-alloy epitaxial layer comprising Ge x Si 1-x , x greater than or equal to 0.0 and less than or equal to 1.0, said method comprising the steps of heating said portion to a first temperature which lies above a critical temperature, said heating being applied as said layer is in a strained state, and cooling the now-disordered portion to a second temperature sufficiently below said critical temperature, and at a rate sufficient to essentially retain disordering of said portion.
Claim 4
Dependent Claim 102 words
In the manufacture or use of a semiconductor device, a method for disordering at least an ordered portion of at least one semiconductor-alloy epitaxial layer comprising Ge x Si 1-x , x greater than or equal to 0.0 and less than or equal to 1.0, said method comprising the steps of heating said portion to a first temperature which lies above a critical temperature, said heating being applied as said layer is in a strained state, and cooling the now-disordered portion to a second temperature sufficiently below said critical temperature, and at a rate sufficient to essentially retain disordering of said portion.
Claim 5
Dependent Claim 16 words
The method of claim 1 or 2, said heating being by exposure to a light beam.
Claim 6
Dependent Claim 10 words
The method of claim 3, further comprising scanning said beam.
Claim 7
Dependent Claim 13 words
The method of claim 3, further comprising detecting light reflected from said portion.
Claim 8
Independent Claim 22 words
The method of claims 1 or 2, x being greater than or equal to 0.1 and less than or equal to 0.9.

References Cited (Backward Citations)

US4093453A Cited
US4205329A Cited
US4261771A Cited
US4529455A Cited
US4661829A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-11-06 1993-05-08 1993-11-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-11-06 1997-05-08 1997-11-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-11-06 2001-05-08 2001-11-07 $7700.00 Window Closed / Lapsed

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