Patent US4874964A successfully refreshed from Google Patents.
US4874964A
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Current generating circuit
Assignee: Sony Corp
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Filing: 1988-04-20
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Granted: 1989-10-17
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Expires: 2008-04-20
Abstract
Abstract A current generating circuit for dividing a current (Dynamic Element Matching) in which a portion of a plurality of transistors constituting change-over circuits arranged therein is removed by weighting the transistors for the operating periods thereof, to thereby largely reduce the number of elements, particularly in the case where a large number of bits are processed. Since the number of bits which each current generating circuit can process can be increased, the number of elements can be easily decreased, so that a source voltage can be reduced when the current generating circuits are connected in multiple stages (in a vertical piling). Further, transistors constituting switching circuits are connected in a Darlington configuration to expand the operating range (dynamic range) of the circuit.
Inventors
- 👤 Tetsuya Kondo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 08:04
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/66; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265; H03M1/74; H03M1/742; H03M1/745
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
126 words
A current generating circuit for generating a plurality of currents accurately in a predetermined integer ratio, comprising: (a) a current dividing circuit for dividing an input current into 2 n (n is a positive integer) output currents; (b) a current change-over circuit for switching respective output currents from said current dividing circuit in a predetermined ratio and providing an output current in response to a predetermined number of clock signals in one cyclic period fed to input terminals of said change-over circuit; and (c) a plurality of current synthesizing circuits for synthesizing output currents from said current dividing circuits and generating a corresponding plurality of output currents in the predetermined ratio in response to a predetermined number of current synthesizing signals in said one cyclic period.
Claim 2
Dependent Claim
126 words
A current generating circuit for generating a plurality of currents accurately in a predetermined integer ratio, comprising: (a) a current dividing circuit for dividing an input current into 2 n (n is a positive integer) output currents; (b) a current change-over circuit for switching respective output currents from said current dividing circuit in a predetermined ratio and providing an output current in response to a predetermined number of clock signals in one cyclic period fed to input terminals of said change-over circuit; and (c) a plurality of current synthesizing circuits for synthesizing output currents from said current dividing circuits and generating a corresponding plurality of output currents in the predetermined ratio in response to a predetermined number of current synthesizing signals in said one cyclic period.
Claim 3
Dependent Claim
37 words
A current generating circuit as claimed in claim 1, wherein said current change-over circuit comprises at least two transistors, and one of said change-over clock signals is supplied to an input terminal of each of the transistors.
Claim 4
Dependent Claim
36 words
A current generating circuit as claimed in claim 1; and further comprising a capacitor connected between an output terminal and a reference voltage for forming a low-pass filter for a current flowing at said output terminal.
Claim 5
Dependent Claim
28 words
A current generating circuit as claimed in claim 1, wherein said current dividing circuit, said current change-over circuit and said current synthesizing circuits are formed of bipolar transistors.
Claim 6
Dependent Claim
43 words
A current generating circuit as claimed in claim 1, wherein each of said current synthesizing circuits is a differential amplifier circuit formed of a pair of transistors each of which is supplied with one of said current synthesizing signals at their respective bases.
Claim 7
Dependent Claim
20 words
A current generating circuit as claimed in claim 5, wherein said differential amplifier circuit is constructed in a Darlington configuration.
Claim 8
Dependent Claim
159 words
A current generating circuit for generating a plurality of currents accurately in a predetermined integer ratio, comprising: (a) at least two sets of current dividing devices each of said sets comprising a current dividing circuit for dividing an input current into 2 n (n is a positive integer) output currents, a plurality of current change-over circuits for dividing respective output currents from said current dividing circuit in a predetermined ratio and a current synthesizing circuit for synthesizing output currents from said respective current change-over circuits and producing a plurality of currents in a predetermined ratio; and (b) a voltage compensating circuit connected to an output terminal of a second one of said at least two sets of current dividing devices and to a current change-over circuit control signal for shifting the voltage level of first input voltage said control signal in response to the output of the second one of said at least two sets of current dividing devices.
Claim 9
Dependent Claim
159 words
A current generating circuit for generating a plurality of currents accurately in a predetermined integer ratio, comprising: (a) at least two sets of current dividing devices each of said sets comprising a current dividing circuit for dividing an input current into 2 n (n is a positive integer) output currents, a plurality of current change-over circuits for dividing respective output currents from said current dividing circuit in a predetermined ratio and a current synthesizing circuit for synthesizing output currents from said respective current change-over circuits and producing a plurality of currents in a predetermined ratio; and (b) a voltage compensating circuit connected to an output terminal of a second one of said at least two sets of current dividing devices and to a current change-over circuit control signal for shifting the voltage level of first input voltage said control signal in response to the output of the second one of said at least two sets of current dividing devices.
Claim 10
Dependent Claim
26 words
A current generating circuit as claimed in claim 3, wherein said current change-over circuits are of differential type arranged in at least a two-stage Darlington configuration.
Claim 11
Dependent Claim
73 words
A current generating circuit as claimed in claim 8, wherein a pair of collectors in a first one of said at least two sets of current dividing devices, connected to a high voltage level relative to a reference potential, of said transistors in at least a two-stage Darlington configuration are connected to the high voltage level of the current dividing circuit in the second one of said two sets of current dividing devices.
Claim 12
Dependent Claim
102 words
A current generating circuit as claimed in claim 8, wherein an output terminal of transistors constituting a pair of Darlington configurations in a first one of said two sets of current dividing devices is connected to the high voltage level relative to a reference potential of said current dividing circuit in the second one of said at least two sets of current dividing devices, and an output signal from said voltage compensating circuit is supplied to an input terminal of the transistors constituting a pair of Darlington configurations in the second one of said at least two sets of current dividing devices.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-10-16 | 1993-04-17 | 1993-10-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-10-16 | 1997-04-17 | 1997-10-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-10-16 | 2001-04-17 | 2001-10-17 | $7700.00 | Window Closed / Lapsed |