Method and apparatus for testing EPROM type semiconductor devices during burn-in

Claim 1

A process for functional testing and for determining the characteristics of EPROM type semiconductor devices during a burn-in treatment, characterized by the following steps: (A) programming an "all 0" pattern the cells of the EPROM devices as received from the assembly lines; (B) loading of the devices into tubes and storing at a temperature equal to or greater than 170° C. for at least 72 hours; (C) automatic loading of single devices from said tubes on cards provided with suitable sockets; verification of the validity of the data programmed during step (A) and automatic rejection of nonvalidated devices; (D) dynamic burn-in treatment at a temperature equal to or greater than 125° C. carried out in a burn-in chamber and subjecting the devices plugged into said sockets of said cards to the following tests while said devices are maintained in said burn-in treatment chamber: (i) verification of the "0" status of all the EPROM cells; (ii) erasing; (iii) programming of a test pattern; (iv) verification of the test pattern; (v) repetition of steps (ii), (iii) and (iv) for a "n" number of different test patterns; (vi) classification of the single devices according to particular quality classes; (vii) programming of a special pattern for subsequent testing; (E) automatic unplugging of the devices from the sockets of said cards and their classification by automatic insertion of the devices into classified tubes in accordance with particular quality grades; (F) testing of dynamic (TAC) parameters of the devices and further classification of devices in function of the determined individual dynamic characteristics; (G) stamping of the devices and final erasing of the data still present in the memory cells.