US4866313A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Cascode BiMOS driving circuit using IGBT
Assignee: Mitsubishi Electric Corp
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Filing: 1988-09-27
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Granted: 1989-09-12
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Expires: 2008-09-27
Abstract
Abstract A cascode BiMOS driving circuit according to the present invention has an IBGBT (9) connected between a first output terminal (3) and the base of a bipolar transistor (Q1). An IGBT generally has a low on-state resistance, and hence a chip area for the IGBT (9) is not so increased, even if the breakdown voltage of the IGBT (9) is made about equal to that of the bipolar transistor (Q1). Thus, a cascode BiMOS driving circuit of low cost and low input capacitance can be implemented. Further, the IGBT (9) is gently turned off due to a so-called tail phenomenon, to prevent an abrupt turn off of the bipolar transistor (Q1), to whereby prevent an occurrence of a surge voltage.
Inventors
- 👤 Mituharu Tabata
- 👤 Gourab Majumdar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 05:53
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H03; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/0814; H03K17/08142; H03K17/16; H03K17/161; H03K17/162; H03K17/163; H03K17/168; H03K17/51; H03K17/56; H03K17/567
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
152 words
A cascode BiMOS driving circuit, comprising: first and second output terminals; first and second control terminals; a cascode BiMOS which comprises a bipolar transistor having a base, a first electrode connected to said first output terminal and a second electrode, and a MOS field effect transistor having a gate connected to said first control terminal, a first electrode connected to said second electrode of said bipolar transistor and a second electrode connected to said second output terminal; excessive voltage absorbing means which is connected between said base of said bipolar transistor and said second output terminal and turned on to pass a current when a voltage across the excessive voltage absorbing means exceeds a predetermined voltage; and an insulated gate bipolar transistor having a gate connected to said second control terminal, a first electrode connected to said first output terminal and a second electrode connected to said base of said bipolar transistor.
Claim 2
Dependent Claim
152 words
A cascode BiMOS driving circuit, comprising: first and second output terminals; first and second control terminals; a cascode BiMOS which comprises a bipolar transistor having a base, a first electrode connected to said first output terminal and a second electrode, and a MOS field effect transistor having a gate connected to said first control terminal, a first electrode connected to said second electrode of said bipolar transistor and a second electrode connected to said second output terminal; excessive voltage absorbing means which is connected between said base of said bipolar transistor and said second output terminal and turned on to pass a current when a voltage across the excessive voltage absorbing means exceeds a predetermined voltage; and an insulated gate bipolar transistor having a gate connected to said second control terminal, a first electrode connected to said first output terminal and a second electrode connected to said base of said bipolar transistor.
Claim 3
Dependent Claim
51 words
A cascode BiMOS driving circuit in accordance with claim 1, wherein said excessive voltage absorbing means comprises; a d.c. voltage bias source, and a diode having an anode connected to said base of said bipolar transistor and a cathode coupled to said second output terminal through said d.c. voltage bias source.
Claim 4
Dependent Claim
20 words
A cascode BiMOS driving circuit in accordance with claim 1, wherein said excessive voltage absorbing means includes an electronic switch.
Claim 5
Dependent Claim
46 words
A cascode BiMOS driving circuit in accordance with claim 3, wherein said electronic switch includes an IGBT having a gate connected to said second control terminal, first electrode connected to said first output terminal and a second electrode connected to said base of said bipolar transistor.
Claim 6
Dependent Claim
20 words
A cascode BiMOS driving circuit in accordance with claim 1, wherein said excessive voltage absorbing means include a mechanical switch.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-09-11 | 1993-03-13 | 1993-09-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-09-11 | 1997-03-13 | 1997-09-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-09-11 | 2001-03-13 | 2001-09-12 | $7700.00 | Window Closed / Lapsed |