Receiver for Manchester encoded data

Claim 1

A receiver for extracting binary data from a Manchester-encoded input signal having a predetermined bit cell rate utilizing an input sampling clock having a frequency that is an integer multiple of the bit cell rate of the input signal, the receiver comprising: (a) means for generating a pulsed signal that pulses in correspondence to midbit transitions of the input signal, comprising: (i) a first D-type flip-flop that receives the input signal as its data input and is clocked by the input sampling clock; (ii) a second D-type flip-flop that receives the output of the first flip-flop as its data input and is clocked by the input sampling clock such that each rising edge of the input sampling clock places new data in the first flip-flop while the prior data of the first-flop is placed in the second flip-flop; add (iii) means responsive to the outputs of the first and second flip-flops for generating the pulsed signal when the logic state of the output of the first flip-flop differs from the logic state of the output of the second flip-flop; (b) means for sampling the input signal at the frequency of the input sampling clock to provide a synchronized data signal having a first bit cell half and a second bit cell half; (c) means for recovering a data sampling clock from the pulsed signal; (d) means for sampling the first bit cell half of the synchronized data signal to provide an output data signal having the logic state of the first bit cell half; and (e) means responsive to the output data signal for providing an extracted binary data signal.