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US4862443A Expired / Lapsed US ⏱️ 0.0 years remaining

Sync signal detection apparatus for accurately synchronizing reproduced data

Assignee: Sharp Corp
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Filing: 1987-02-27
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Granted: 1989-08-29
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Expires: 2007-02-27
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Abstract

Abstract A sync signal detection apparatus is provided wherein a sync signal represents the top of recorded data. The sync signal includes a plurality of marks each having a different pattern from the pattern of any other mark. The apparatus is equipped with a circuit for sequentially detecting the patterns of the individual marks in a reproduction mode. Also, a circuit is provided generating a sync pulse at the top of the data in accordance with the address pattern of the mark after a predetermined number of marks are detected. The apparatus ensures accurate reproduction of the recorded data with a small number of bits and an increase in data reliability.

Inventors

  • 👤 Kentaroh Tsuji
  • 👤 Shigemi Maeda
  • 👤 Takeshi Yamaguchi
  • 👤 Toshihisa Deguchi
  • 👤 Noriaki Sakamoto
  • 👤 Shigeo Terashima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 18:12
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/93; H04N5/935; G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 103 words
A sync signal detection apparatus for detecting a sync signal indicating the top of recorded data, the sync signal being divided into a plurality of unique marks and each of the plurality of marks being divided into a sync pattern and an address pattern, comprising: means for sequentially detecting the sync and address patterns for each of the plurality of marks during a reproduction mode; and means for generating a sync pulse at the top of the recorded data corresponding to the address pattern for said marks in response to a predetermined number of marks being detected by said means for sequentially detecting.
Claim 2
Dependent Claim 103 words
A sync signal detection apparatus for detecting a sync signal indicating the top of recorded data, the sync signal being divided into a plurality of unique marks and each of the plurality of marks being divided into a sync pattern and an address pattern, comprising: means for sequentially detecting the sync and address patterns for each of the plurality of marks during a reproduction mode; and means for generating a sync pulse at the top of the recorded data corresponding to the address pattern for said marks in response to a predetermined number of marks being detected by said means for sequentially detecting.
Claim 3
Dependent Claim 21 words
The detection apparatus as defined in claim 1, wherein said sync signal is recorded in a non-return to zero inverted system.
Claim 4
Dependent Claim 122 words
A sync signal detection apparatus for detecting a sync signal for indicating the top of recorded data comprising: driver means for reading a recorded data signal; synchronization means for synchronizing said recorded data signal and developing a read data non-return to zero inverted (NRZI) signal and a read clock signal; conversion means for converting said read data NRZI signal to a read data non-return to zero (NRZ) signal; detecting means for detecting bits of said read data NRZ signal and generating a detection pulse in response to detecting a predetermined number of bits; and counting means for detecting said read clock signal after the generation of said detection pulse and generating the sync signal representative of the top of the recorded data.
Claim 5
Dependent Claim 122 words
A sync signal detection apparatus for detecting a sync signal for indicating the top of recorded data comprising: driver means for reading a recorded data signal; synchronization means for synchronizing said recorded data signal and developing a read data non-return to zero inverted (NRZI) signal and a read clock signal; conversion means for converting said read data NRZI signal to a read data non-return to zero (NRZ) signal; detecting means for detecting bits of said read data NRZ signal and generating a detection pulse in response to detecting a predetermined number of bits; and counting means for detecting said read clock signal after the generation of said detection pulse and generating the sync signal representative of the top of the recorded data.

References Cited (Backward Citations)

US3947878A Cited
US4275466A Cited
US4697167A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-08-28 1993-02-27 1993-08-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-08-28 1997-02-27 1997-08-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-08-28 2001-02-27 2001-08-29 $7700.00 Window Closed / Lapsed

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