Programming implementation circuit

Claim 2

A circuit for applying an optimized programming current to a floating-gate, metal-oxide-semiconductor transistor in response to enabling signals, to a current-limiting signal and to a decoder signal comprising: a programming voltage source; a programming control means connected to said programming voltage source and to the drain of said floating-gate transistor; an enabling means connected to said enabling signals, to said control means, and to said current-limiting signal; and a decoder switching means connected to said enabling means; wherein during programming operation said programming control means is activated by said decoder switching means and said enabling means to allow a limited current to flow from said voltage source to said drain of said floating-gate transistor, and wherein during non-programming operation said programming control means permits negligible current flow from said voltage source to said drain of said floating-gate transistor.

Claim 3

The circuit of claim 1 in which said drain of said floating-gate transistor during non-programming operation is connected by said enabling means to a sense amplifier input.

Claim 4

The circuit of claim 1 in which said programming control means is a P-channel field-effect transistor with source/drain terminals connected to said voltage source and to said drain of said floating-gate transistor.

Claim 5

The circuit of claim 1 in which said decoder switching means is a N-channel field-effect transistor having its gate connected to said decoder signal.

Claim 6

The circuit of claim 4 in which said enabling means comprises a P-channel field-effect transistor with source/drain terminals connected to the gate of said programming control means and to said programming voltage source, a N-channel field-effect transistor with source/drain terminals connected to said gate of said programming control means and to a source/drain terminal of said decoder switching means, a N-channel field-effect transistor with source/drain terminals connected to said terminal of said decoder switching means and to said drain of said floating-gate transistor, and a N-channel transistor with source/drain terminals connected to the other source/drain terminal of said decoder switching means and to said current limiting signal.

Claim 7

The circuit of claim 5 in which the gate of said enabling P-channel transistor is connected to the common source/drain connection of another enabling P-channel transistor and a grounded low-current device, both of which are in series with the gate and source/drain terminal of yet another P-channel transistor connected to said voltage source.

Claim 8

The circuit of claim 6 in which said low current device is a N-channel field-effect transistor with its gate connected to a source of voltage.

Claim 9

A circuit for enabling and disenabling connection of a FAMOS transistor to a sense amplifier and for enabling and disenabling a P-channel programming control transistor with source/drain terminals connected between the drain of said FAMOS transistor and a programming voltage source, comprising: a N-channel decoder transistor having its gate connected to a source of decoder signals, a P-channel transistor with source/drain terminals connected to the gate of said programming control transistor and to said programming voltage source and with is gate terminal connected to receive a first signal from an enabling circuit, a N-channel transistor with source/drain terminals connected to said gate of said programming control transistor and to a first source/drain terminal of said N-channel decoder transistor and with its gate terminal connected to receive a second signal from said enabling circuit, a N-channel transistor with source/drain terminals connected between said terminal of said N-channel decoder transistor and said drain of said FAMOS transistor and with its gate terminal connected to receive a third signal from said enabling circuit, and a N-channel transistor with source/drain terminals connected between the second source/drain terminal of said N-channel decoder transistor and a current-limiting signal source and with its gate connected to receive said second signal from said enabling circuit.

Claim 10

A circuit for enabling and disenabling connection of a FAMOS transistor to a sense amplifier and for enabling and disenabling a P-channel programming control transistor with source/drain terminals connected between the drain of said FAMOS transistor and a programming voltage source, comprising: a N-channel decoder transistor having its gate connected to a source of decoder signals, a P-channel transistor with source/drain terminals connected to the gate of said programming control transistor and to said programming voltage source and with is gate terminal connected to receive a first signal from an enabling circuit, a N-channel transistor with source/drain terminals connected to said gate of said programming control transistor and to a first source/drain terminal of said N-channel decoder transistor and with its gate terminal connected to receive a second signal from said enabling circuit, a N-channel transistor with source/drain terminals connected between said terminal of said N-channel decoder transistor and said drain of said FAMOS transistor and with its gate terminal connected to receive a third signal from said enabling circuit, and a N-channel transistor with source/drain terminals connected between the second source/drain terminal of said N-channel decoder transistor and a current-limiting signal source and with its gate connected to receive said second signal from said enabling circuit.