Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
309 words
A distributor for a central execution pipeline unit of a central processor having a plurality of execution units including a central execution unit, said central processor also including an instruction fetch unit, a cache, and a collector; and cache, collector, and central execution pipeline units being sources of signals representing machine words applied to the distributor; said distributor comprising: first switch means for producing a pair of first switch means output machine words selected from signals applied to the first switch means; data register means including an even numbered register and an odd numbered register for storing a pair of machine words, one machine word being stored in the even numbered register and one machine word being stored in the odd numbered register thereof; second switch means for producing as its output two second switch means output machine words selected from said first switch means output machine words or two machine words from the cache, and for applying said second switch means output words for storage in the registers of said data register means; character alignment switch means to which a machine word from a data register of said data register means is applied for producing character alignment switch means output signals which includes a character of the machine word applied thereto; word alignment switch means to which both machine words stored in data registers of the data register means are applied for producing a word alignment means output machine word; sources of signals applied to the first switch means including machine words from the collector, the central execution unit, the word alignment switch means, and signals from the character alignment switch means; means for transmitting the first switch means output machine words to the instruction fetch unit and the central execution unit; and means for transmitting machine words stored in the data register means to the execution units.
Claim 2
Dependent Claim
309 words
A distributor for a central execution pipeline unit of a central processor having a plurality of execution units including a central execution unit, said central processor also including an instruction fetch unit, a cache, and a collector; and cache, collector, and central execution pipeline units being sources of signals representing machine words applied to the distributor; said distributor comprising: first switch means for producing a pair of first switch means output machine words selected from signals applied to the first switch means; data register means including an even numbered register and an odd numbered register for storing a pair of machine words, one machine word being stored in the even numbered register and one machine word being stored in the odd numbered register thereof; second switch means for producing as its output two second switch means output machine words selected from said first switch means output machine words or two machine words from the cache, and for applying said second switch means output words for storage in the registers of said data register means; character alignment switch means to which a machine word from a data register of said data register means is applied for producing character alignment switch means output signals which includes a character of the machine word applied thereto; word alignment switch means to which both machine words stored in data registers of the data register means are applied for producing a word alignment means output machine word; sources of signals applied to the first switch means including machine words from the collector, the central execution unit, the word alignment switch means, and signals from the character alignment switch means; means for transmitting the first switch means output machine words to the instruction fetch unit and the central execution unit; and means for transmitting machine words stored in the data register means to the execution units.
Claim 3
Dependent Claim
17 words
A distributor as defined in claim 1 in which a character comprises a predetermined number of bits.
Claim 4
Dependent Claim
16 words
A distributor as defined in claim 2 in which the predetermined number of bits is nine.
Claim 5
Dependent Claim
16 words
A distributor as defined in claim 2 in which the predetermined number of bits is six.
Claim 6
Dependent Claim
16 words
A distributor as defined in claim 2 in which a machine word consists of 36 bits.
Claim 7
Dependent Claim
475 words
A distributor for a central execution pipeline unit of a central processor having an instruction fetch unit, a collector unit, a cache unit, and a plurality of execution units, one of said execution units being a central execution unit, said distributor comprising: first A/Q register means for storing signals of machine words which are copies of an A/Q register of one of said first execution units; second A/Q register means for storing signals of machine words which are copies of an A/Q register of the central execution unit; A/Q switch means to which the signals stored in the first and second A/Q register means are applied for producing as a switch means output, the signals of the A/Q switch means output being those of the machine words stored in the first or second A/Q register means; effective address register means for storing signals which are an effective address of a machine word; data register means having an even word portion and an odd word portion for storing signals of a pair of machine words, the word stored in the even portion register being designated as an even numbered word, and the word stored in the odd portion register being designated as an odd numbered word; character alignment switch means to which signals representing one of the machine words stored in the data register means are applied for selecting as a character alignment switch means output, signals representing a designated one of the characters of the applied machine word; word alignment switch means having a plurality of positions each of which when enabled determines the output of said switch and to which alignment switch means are applied signals representing machine words stored in the data register means, signals representing the effective address from the effective address register means, said word alignment switch means selecting as a word alignment switch means output, signals corresponding to one of the two machine words, or the effective address signals which effective address signals can occupy two different positions in the word alignment switch means output depending upon which of two different positions of the word alignment switch means is enabled; data switch means to which the A/Q switch means output, the character alignment switch means outputs, the word alignment switch means output and signals from the collector are applied for producing data switch means output signals representing two machine words; data register switch means to which the data switch means output signals and signals of two machine words from the cache unit are applied for selecting signals representing two machine words and for applying the selected signals to the data register means for storage therein; means for transmitting the signals stored in the data register means to the execution units; and means for transmitting the data switch means output signals to the central execution unit and the instruction fetch unit.
Claim 8
Dependent Claim
475 words
A distributor for a central execution pipeline unit of a central processor having an instruction fetch unit, a collector unit, a cache unit, and a plurality of execution units, one of said execution units being a central execution unit, said distributor comprising: first A/Q register means for storing signals of machine words which are copies of an A/Q register of one of said first execution units; second A/Q register means for storing signals of machine words which are copies of an A/Q register of the central execution unit; A/Q switch means to which the signals stored in the first and second A/Q register means are applied for producing as a switch means output, the signals of the A/Q switch means output being those of the machine words stored in the first or second A/Q register means; effective address register means for storing signals which are an effective address of a machine word; data register means having an even word portion and an odd word portion for storing signals of a pair of machine words, the word stored in the even portion register being designated as an even numbered word, and the word stored in the odd portion register being designated as an odd numbered word; character alignment switch means to which signals representing one of the machine words stored in the data register means are applied for selecting as a character alignment switch means output, signals representing a designated one of the characters of the applied machine word; word alignment switch means having a plurality of positions each of which when enabled determines the output of said switch and to which alignment switch means are applied signals representing machine words stored in the data register means, signals representing the effective address from the effective address register means, said word alignment switch means selecting as a word alignment switch means output, signals corresponding to one of the two machine words, or the effective address signals which effective address signals can occupy two different positions in the word alignment switch means output depending upon which of two different positions of the word alignment switch means is enabled; data switch means to which the A/Q switch means output, the character alignment switch means outputs, the word alignment switch means output and signals from the collector are applied for producing data switch means output signals representing two machine words; data register switch means to which the data switch means output signals and signals of two machine words from the cache unit are applied for selecting signals representing two machine words and for applying the selected signals to the data register means for storage therein; means for transmitting the signals stored in the data register means to the execution units; and means for transmitting the data switch means output signals to the central execution unit and the instruction fetch unit.