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Dual flash analog-to-digital converter

Assignee: Individual
•
Filing: 1987-07-20
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Granted: 1989-08-15
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Expires: 2007-07-20
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Abstract

Abstract A resistive network is coupled to a reference source for providing a plurality of reference signals. A comparator/multiplexer section compares a comparison signal against the reference signals, selects one of the reference signals and produces a code. An amplifier provides the comparison signal in response to the ADC input signal and subsequently in response to a signal difference between the ADC input signal and selected reference signal. Two codes are encoded and added in an adder/accumulator for providing the output code of the ADC.

Inventors

  • 👤 Zdzislaw Gulczynski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 22:39
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/14; H03M1/16; H03M1/162; H03M1/34; H03M1/36; H03M1/361; H03M1/362; H03M1/365

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 136 words
Analog-to-digital converter (ADC) for converting input signal into output code, comprising: a pair of reference signal sources; a resistive means coupled between the reference signal sources for providing a plurality of reference signals; comparator means for comparing a first and second comparison signals against the reference signals, and producing respectively a first and second codes in response thereto; a multiplexer means for selecting one of the reference signals in response to the first code; an amplifying means for providing the first comparison signal in response to the ADC input signal, for amplifying a signal difference between the ADC input signal and the reference signal selected by the multiplexer means, and providing the second comparison signal in response thereto; and a digital means for converting the first and second codes into the output code of the ADC.
Claim 2
Dependent Claim 136 words
Analog-to-digital converter (ADC) for converting input signal into output code, comprising: a pair of reference signal sources; a resistive means coupled between the reference signal sources for providing a plurality of reference signals; comparator means for comparing a first and second comparison signals against the reference signals, and producing respectively a first and second codes in response thereto; a multiplexer means for selecting one of the reference signals in response to the first code; an amplifying means for providing the first comparison signal in response to the ADC input signal, for amplifying a signal difference between the ADC input signal and the reference signal selected by the multiplexer means, and providing the second comparison signal in response thereto; and a digital means for converting the first and second codes into the output code of the ADC.
Claim 3
Dependent Claim 36 words
ADC of claim 1, wherein the amplifying means includes a sampling means coupled in series with the ADC input signal for sensing the ADC input signal, and including a capacitor for storing a momentary value thereof.
Claim 4
Dependent Claim 25 words
ADC of claim 1, wherein the amplifying means includes a switching means for successively applying the first and second comparison signals to the comparator means.
Claim 5
Dependent Claim 24 words
ADC of claim 3, wherein the amplifying means includes a differential amplifier means for amplifying the signal difference and providing the second comparison signal.
Claim 6
Dependent Claim 15 words
ADC of claim 1, wherein the resistive means includes equally valued resistors coupled in series.
Claim 7
Dependent Claim 13 words
ADC of claim 1, wherein one of the reference signal sources is ground.
Claim 8
Dependent Claim 29 words
ADC of claim 1, wherein the digital means includes encoder binary codes, and an adder/accumulator means for adding the binary codes and providing the output code of the ADC.

References Cited (Backward Citations)

US4393368A Cited
US4535319A Cited
US4639715A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-08-14 1993-02-13 1993-08-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-08-14 1997-02-13 1997-08-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-08-14 2001-02-13 2001-08-15 $7700.00 Window Closed / Lapsed

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