Patent US4855726A successfully refreshed from Google Patents.
US4855726A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal tracing apparatus for logic circuit diagrams
Assignee: Toshiba Corp
•
Filing: 1987-09-29
•
Granted: 1989-08-08
•
Expires: 2007-09-29
Abstract
Abstract In a logic circuit diagram processing apparatus, when an original signal name or an original signal line is designated, all the signal lines associated with the designated signal (i.e. signal lines through which the designated signal is passed; logic elements to which the designated signal lines are connected; signal lines connected to the logic elements to which already-traced signal lines are connected, etc.) are displayed in color or colors, for instance, visually different from that of other signal lines, for providing an easy operator's visual confirmation or visual check of a logic circuit.
Inventors
- 👤 Seiichi Nishio
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:07
CPC Classifications
G; G06; G06T; G06T11/00; G06T11/20; G06T11/23
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
98 words
A signal tracing apparatus for a logic circuit diagram which comprises: (a) means for designating an original signal or an original signal line in a logic circuit diagram; (b) means for tracing a plurality of signal lines associated with the designated original signal or original signal line and for changing a display attribute of the plurality of traced signal lines from that of other untraced signal lines; and (c) means for displaying the traced signal lines in a way visually distinguishable from the other untraced signal ines in a logic circuit diagram in accordance with the display attribute.
Claim 2
Dependent Claim
98 words
A signal tracing apparatus for a logic circuit diagram which comprises: (a) means for designating an original signal or an original signal line in a logic circuit diagram; (b) means for tracing a plurality of signal lines associated with the designated original signal or original signal line and for changing a display attribute of the plurality of traced signal lines from that of other untraced signal lines; and (c) means for displaying the traced signal lines in a way visually distinguishable from the other untraced signal ines in a logic circuit diagram in accordance with the display attribute.
Claim 3
Dependent Claim
18 words
The apparatus as set forth in claim 1, wherein said original signal designating means is a key board.
Claim 4
Dependent Claim
17 words
The apparatus as set forth in claim 1, wherein said original signal designating means is a mouse.
Claim 5
Dependent Claim
76 words
The apparatus as set forth in claim 1, wherein said signal line tracing means is a CPU including a memory unit for executing the signal tracing operation and the display attribute changing operation in accordance with a program stored in the memory unit and in cooperation with a net table, a node table and a display attribute table all prepared on the basis of a logic circuit to be traced and stored in the memory unit.
Claim 6
Dependent Claim
37 words
The apparatus as set forth in claim 4, wherein the net table lists relationships between signal line names, source node names, kinds of source terminal, destination node names, kinds of destination terminal, display attribute value and coordinates.
Claim 7
Dependent Claim
28 words
The apparatus as set forth in claim 4, wherein the node table lists relationships between node names, kinds of nodes, kinds of terminal and associated signal line names.
Claim 8
Dependent Claim
59 words
The apparatus as set forth in claim 1, wherein a plurality of the traced signal lines are signal lines through which a designated signal is passed; logic elements to which a designated signal is passed; logic elements to which a designated signal line is connected; and signal lines connected to logic element to which already-traced signal lines are connected.
Claim 9
Dependent Claim
19 words
The apparatus as set forth in claim 1, wherein said displaying means changes color of the traced signal lines.
Claim 10
Dependent Claim
19 words
The apparatus as set forth in claim 1, wherein said displaying means changes thickness of the traced signal lines.
Claim 11
Dependent Claim
23 words
The apparatus as set forth in claim 1, wherein said displaying means displays the traced signal lines by flashing said traced signal line.
Claim 12
Dependent Claim
26 words
The apparatus as set forth in claim 10, wherein said displaying means changes line type of said traced signal line to solid, broken and chain lines.
Claim 13
Dependent Claim
25 words
The apparatus as set forth in claim 1, wherein a signal line is traced beginning from a designated original signal line to a logic gate.
Claim 14
Dependent Claim
24 words
The apparatus as set forth in claim 1, wherein signal lines are traced beginning from a designated original signal line to a storage element.
Claim 15
Dependent Claim
24 words
The apparatus as set forth in claim 1, wherein signal lines are traced beginning from a designated original signal line to an output terminal.
Claim 16
Dependent Claim
25 words
The apparatus as set forth in claim 1, wherein signal lines are traced from an input side to an output side in a logic circuit.
Claim 17
Dependent Claim
25 words
The apparatus as set forth in claim 1, wherein signal lines are traced from an output side to an input side in a logic circuit.
Claim 18
Independent Claim
243 words
A method of tracing signals in a logic circuit diagram which comprises the following steps of: (a) designating an original signal name on a logic circuit diagram; (b) looking up the designated original signal in a net table to change a display attribute value corresponding to the designated original signal; (c) looking up a destination node name corresponding to the designated original signal in a node table to determine whether the kind of node corresponding to the destination node name is an output terminal; (d) if the result of the determination in step (c) is YES, completing the remaining signal tracing operation; (e) if the results of the determination in step (c) is NO, determining an associated signal line name whose terminal is an output in the node table; (f) looking up the determined associated signal line name in the net table to change a display attribute value corresponding to the associated signal line name; (g) looking up a destination node name corresponding to the associated signal line name in a node table to determine whether the kind of node corresponding to the associated node name is an output terminal; (h) repeating the above steps from (e) to (g) until the kind of node is determined as an output terminal; (i) displaying the traced signal lines influenced by the designated original signal in a way visually distinguishable from other untraced signal lines in a logic circuit diagram in accordance with the display attribute.
Claim 19
Independent Claim
243 words
A method of tracing signals in a logic circuit diagram which comprises the following steps of: (a) designating an original signal name on a logic circuit diagram; (b) looking up the designated original signal in a net table to change a display attribute value corresponding to the designated original signal; (c) looking up a destination node name corresponding to the designated original signal in a node table to determine whether the kind of node corresponding to the destination node name is an output terminal; (d) if the result of the determination in step (c) is YES, completing the remaining signal tracing operation; (e) if the results of the determination in step (c) is NO, determining an associated signal line name whose terminal is an output in the node table; (f) looking up the determined associated signal line name in the net table to change a display attribute value corresponding to the associated signal line name; (g) looking up a destination node name corresponding to the associated signal line name in a node table to determine whether the kind of node corresponding to the associated node name is an output terminal; (h) repeating the above steps from (e) to (g) until the kind of node is determined as an output terminal; (i) displaying the traced signal lines influenced by the designated original signal in a way visually distinguishable from other untraced signal lines in a logic circuit diagram in accordance with the display attribute.
Claim 20
Dependent Claim
121 words
The method as set forth in claim 17, which further comprises the following steps of: (j) designating trace modes from a designated original signal line to any one of a logic gate, a storage element, an external terminal, and a designated depth; (k) changing a display attribute value in accordance with the designated display attribute value; (l) determining whether a current tracing operation, successively from the original, reaches an element designated in trace mode; (m) if the result of the determination in step (1) is YES, ending the tracing operation; and (n) if the result of the determination in step (1) is NO, repeating the tracing operations until the tracing operation reaches an element which was designated in the trace mode.
References Cited (Backward Citations)
US4656603A
Cited
US4710763A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-08-07 | 1993-02-06 | 1993-08-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-08-07 | 1997-02-06 | 1997-08-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-08-07 | 2001-02-06 | 2001-08-08 | $7700.00 | Window Closed / Lapsed |