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US4853755A
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Method for manufacturing a thin-film transistor array and a thin-film transistor array manufactured by the method
Assignee: LG Display Co Ltd
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Filing: 1988-03-17
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Granted: 1989-08-01
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Expires: 2008-03-17
Abstract
Abstract In a thin-film transistor array, a plurality of gate buses and a plurality of source buses are formed on a substrate in such a manner that said gate buses are intersected with said source buses at crossover portions, and a plurality of thin-film transistors are formed on the substrate adjacent to the crossover portion, which are connected to the gate buses and source buses for a driving purpose. Furthermore, an auxiliary bus is formed on either the gate buses, or source buses, shortcircuited portions of which are cut out by means of laser trimming so as to conduct the gate buses or source buses.
Inventors
- 👤 Kazuya Okabe
- 👤 Hideyuki Matsuda
- 👤 Chisato Iwasaki
- 👤 Satoshi Fujimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 19:14
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/1368; H; H10; H10D; H10D86/00; H10D86/80; H10D86/85; G02F1/136259; G02F1/136263; G02F1/136286; G02F1/13629; Y; Y10; Y10S; Y10S438/00; Y10S438/94
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
106 words
A thin-film transistor array wherein a plurality of gate buses and a plurality of source buses are formed on a substrate in such a manner that said gate buses are intersected with said source buses at crossover portions, and a plurality of thin-film transistors are formed on the substrate adjacent to the crossover portion, which are connected to said gate buses and source buses for a driving purpose, characterized in that an auxiliary bus is formed on either the gate buses, or source buses, shortcircuited portions of which are cut out by means of laser trimming, so as to conduct said gate buses or source buses.
Claim 2
Dependent Claim
106 words
A thin-film transistor array wherein a plurality of gate buses and a plurality of source buses are formed on a substrate in such a manner that said gate buses are intersected with said source buses at crossover portions, and a plurality of thin-film transistors are formed on the substrate adjacent to the crossover portion, which are connected to said gate buses and source buses for a driving purpose, characterized in that an auxiliary bus is formed on either the gate buses, or source buses, shortcircuited portions of which are cut out by means of laser trimming, so as to conduct said gate buses or source buses.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-07-31 | 1993-01-30 | 1993-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-07-31 | 1997-01-30 | 1997-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-07-31 | 2001-01-30 | 2001-08-01 | $7700.00 | Window Closed / Lapsed |