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US4853526A Expired / Lapsed US ⏱️ 0.0 years remaining

Data carrier arrangement having an integrated circuit

Assignee: GAO Gesellschaft fuer Automation und Organisation mbH
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Filing: 1987-10-26
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Granted: 1989-08-01
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Expires: 2007-10-26
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Abstract

Abstract The present invention relates to a data carrier arrangement having an integrated circuit (1) for obtaining of services, goods or the like, the integrated circuit (1) having at least one non-volatile data memory (2) with a predetermined number of memory cells which are readable, erasable and writable. In the data carrier arrangement described, the integrated circuit (1) has along with the data memory (2) a counter (3) consisting of a plurality of stages, and a control and security logic (4), the counter (3) being operable only in one predetermined direction, the size of the data memory (2) being selected such that its memory cells are adapted to the steps of the counter, and the control and security logic (4) controlling, among other things, the data transfer between the memory (2) and the counter (3) in such a way that before each use of the data carrier the current memory value is transferred to the counter and after use of the data carrier the memory content is updated with the new counter reading.

Inventors

  • 👤 Wolfgang Effing

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 23:47
CPC Classifications
G; G07; G07F; G07F7/00; G07F7/08; G07F7/0866; G06; G06Q; G06Q20/00; G06Q20/30; G06Q20/34; G06Q20/343; G06Q20/3433; G07B; G07B15/00; G07F7/02

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 161 words
A data carrier arrangement for obtaining services, goods, or the like and having an integrated circuit (1); the integrated circuit having at least one non-volatile data memory (2) with a predetermined number of memory cells which are readable, erasable and writable; the integrated circuit (1) having along with the data memory (2) a counter (3) comprising a plurality of stages, and a control and security logic (4); the counter (3) being operable only in one predetermined direction; the size of the data memory (2) being selected such that its memory cells are adapted to the stages of the counter (3); and the control and security logic (4) controlling, among other things, the data transfer between the memory (2) and the counter (3) in such a way that, before each use of the data carrier, the current memory value is transferred to the counter and, after the use of the data carrier, the memory content is updated with the new counter reading.
Claim 2
Dependent Claim 161 words
A data carrier arrangement for obtaining services, goods, or the like and having an integrated circuit (1); the integrated circuit having at least one non-volatile data memory (2) with a predetermined number of memory cells which are readable, erasable and writable; the integrated circuit (1) having along with the data memory (2) a counter (3) comprising a plurality of stages, and a control and security logic (4); the counter (3) being operable only in one predetermined direction; the size of the data memory (2) being selected such that its memory cells are adapted to the stages of the counter (3); and the control and security logic (4) controlling, among other things, the data transfer between the memory (2) and the counter (3) in such a way that, before each use of the data carrier, the current memory value is transferred to the counter and, after the use of the data carrier, the memory content is updated with the new counter reading.
Claim 3
Dependent Claim 28 words
A data carrier arrangement according to claim 1, characterized in that the non-volatile memory (2) is an electrically erasable and writable memory of the E 2 PROM type.
Claim 4
Dependent Claim 22 words
A data carrier arrangement according to claim 1, characterized in that the counter (3) is a binary counter with a set input.
Claim 5
Dependent Claim 41 words
A data carrier arrangement according to claim 1, characterized in that the control and security logic (4) has a circuit comprising a decoding logic (10) and at least one blocking gate (11) which blocks operation of the counter before an overflow.
Claim 6
Dependent Claim 47 words
A data carrier arrangement according to claim 1, characterized in that the control and security logic (4) has a circuit (14, 15) which after each application of a supply voltage generates a predefind pulse which blocks at least control lines (φ, C1, C2) leading to the circuit.
Claim 7
Dependent Claim 43 words
A data carrier arrangement according to claim 5, characterized in that the circuit (14, 15) is designed in such a way that the block can be removed by a reset pulse, this pulse also serving as a loading pulse for the counter (3).

References Cited (Backward Citations)

US3934122A Cited
US4498000A Cited
US4717815A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-07-31 1993-01-30 1993-08-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-07-31 1997-01-30 1997-08-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-07-31 2001-01-30 2001-08-01 $7700.00 Window Closed / Lapsed

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