Encoder

Claim 1

A parallel type n-bit analog-to-digital converter, comprising: a voltage driving means to provide reference voltages of 2 n -1 graduated levels wherein "n" represents the number of output bits, a plurality of quantizing circuits comprising 2 n -1 comparators and 2 n -1 exclusive OR circuits, wherein each of said comparators compares an input voltage with each of said reference voltages, and wherein each of said exclusive OR circuits has an output transistor, and each inputs outputs of two comparators, by which said analog input voltage is compared with reference voltages of two adjacent levels, within said 2 n -1 comparators for detecting a change position of an output pattern of said plurality of comparators, wherein said quantizing circuits are divided into a plurality of first blocks, and wherein the quantizing circuits are further divided into two opposed second blocks within each of said first blocks; a plurality of sets of n-bit separate bit lines, each set being respectively arranged between said two opposed second blocks within one of said first blocks for connecting emitters of output transistors of said exclusive OR circuits within each of said first blocks according to a binary code expressing the level of each change position to be detected by each of said exclusive OR circuits; and emitter follower circuits for connecting said plurality of sets of separate bit lines in parallel to one set of n-bit output bit lines which are arranged in the perpendicular direction of said separate bit lines and for separating parasitic capacitance related to each set of separate bit lines, whereby said emitter follower circuits can be placed in the wiring regions of said output lines.