Patent US4851786A successfully refreshed from Google Patents.
US4851786A
Expired / Lapsed
US
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Differential amplifier
Assignee: Fairchild Semiconductor Corp
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Filing: 1988-12-23
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Granted: 1989-07-25
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Expires: 2008-12-23
Abstract
Abstract An improved differential amplifier having circuitry to enhance the slew rate and to provide a means for nulling the offset voltage during fabrication of the amplifier as an integrated circuit. The differential amplifier comprises an input stage connected to a current mirror. A slew rate enhancement circuit injects current into selected points of the circuit when the input voltage exceeds a predetermined threshold. An offset trim circuit injects a selected amount of current into the current mirror to alter the current flow between the input stage and the current mirror, thereby reducing the offset voltage. The selected amount of current is dictated by diodes which may be permanently shorted at various stages during fabrication, both before and after the amplifier is enclosed in an IC package.
Inventors
- 👤 Charles L. Vinn
- 👤 Thinh C. Nguyen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 11:08
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45278; H03F3/45363; H03F3/45479; H03F3/45632; H03F3/45744; H03F3/45766
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
221 words
In a differential amplifier of the type having: (a) an input stage; (b) a current mirror coupled to the input stage via first and second leads wherein a positive input voltage increases the current in the first lead and a negative input voltage decreases the current in the first lead; and (c) a gain stage connected via a third lead to the second lead wherein an increase in current in the first lead increases the flow of current in the third lead in the direction out of the gain stage and a decrease in current in the first lead increases the flow of current in the third lead in a direction into the gain stage, an improved offset trim circuit comprising: (i) means for producing an adjustment current, said means comprising: (a) a plurality of sources of current; (b) a like plurality of diodes, each diode connecting one of the plurality of sources of current to a common node; (c) a first output diode connecting the common node to a first output line; and (d) a second output diode connecting the common node to a second output line; (ii) wherein the first output line is connected to the first lead of the current mirror; and (iii) wherein the second output line is connected to the second lead of the current mirror.
Claim 2
Dependent Claim
221 words
In a differential amplifier of the type having: (a) an input stage; (b) a current mirror coupled to the input stage via first and second leads wherein a positive input voltage increases the current in the first lead and a negative input voltage decreases the current in the first lead; and (c) a gain stage connected via a third lead to the second lead wherein an increase in current in the first lead increases the flow of current in the third lead in the direction out of the gain stage and a decrease in current in the first lead increases the flow of current in the third lead in a direction into the gain stage, an improved offset trim circuit comprising: (i) means for producing an adjustment current, said means comprising: (a) a plurality of sources of current; (b) a like plurality of diodes, each diode connecting one of the plurality of sources of current to a common node; (c) a first output diode connecting the common node to a first output line; and (d) a second output diode connecting the common node to a second output line; (ii) wherein the first output line is connected to the first lead of the current mirror; and (iii) wherein the second output line is connected to the second lead of the current mirror.
Claim 3
Dependent Claim
49 words
The improved offset trim circuit of claim 1 additionally comprising: (a) an additional source of current; (b) a first additional diode connecting the additional source of current to the first output line; and (c) a second additional diode connecting the additional source of current to the second output line.
Claim 4
Dependent Claim
66 words
The improved offset trim circuit of claim 1 additionally comprising: (a) a test pad connected to the common node; (b) a test pad connected to the first output line; (c) a test pad connected to the second output line; (d) a plurality of test pads, each pad connected to one of the plurality of diodes at the end of the diode away from the common node.
Claim 5
Dependent Claim
98 words
The improved offset trim circuit of claim 2 wherein: (a) the amplifier is enclosed in an integrated circuit package having a plurality of output pins; (b) the end of the first additional diode connected to the additional source of current and the end of the second additional diode connected to the additional source of current is connected to one of the output pins; (c) the first output line is connected via first isolating means to one of the output pins; and (d) the second output line is connected via second isolating means to one of the output pins.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-07-24 | 1993-01-23 | 1993-07-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-07-24 | 1997-01-23 | 1997-07-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-07-24 | 2001-01-23 | 2001-07-25 | $7700.00 | Window Closed / Lapsed |