Vector processing system for processing plural vector instruction streams

Claim 1

A vector processor comprising: a main storage for storing vector elements; a plurality of memory port logic units for accessing the main storage; a plurality of vector processing units for executing vector instruction streams different from each other, each vector processing unit having a plurality of vector registers for storing vector elements, a vector arithmetic and logic unit for vector calculations between vector elements stored in the vector registers and transmitting means for transmitting a result of the vector calculation to one of the vector registers; a plurality of resource management means, assigned to vector processing units different from each other, for selecting a memory port logic unit among the plurality of memory port logic units in a case where the corresponding vector processing unit performs a vector instruction stream, and for reporting which memory port logic units are selected to other resource management means, thereby the other resource management means may select another memory port logic unit in accordance with the report; one of said plurality memory port logic units selected by a certain resource management means of said plurality of resource management means, making use of vector elements transmitted between the main storage and a vector register included in the vector processing unit to which the certain resource management means corresponds, whereby the plurality of memory port logic units are shared by the plurality of vector processing units executing vector instruction streams different from each other.