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US4848876A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic control circuit for preventing abnormal operation of a slave control circuit

Assignee: Brother Industries Ltd
•
Filing: 1988-04-11
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Granted: 1989-07-18
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Expires: 2008-04-11
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Abstract

Abstract In an electronic control system having a main CPU and a slave CPU which is under the control of the main CPU, a power control circuit is provided between the power source and the slave CPU to stop supplying power to the slave CPU until the main CPU starts normal operation when the power to the overall system is turned on. The slave CPU does not start operation until the main CPU becomes capable of normal operation and control over the slave CPU, which prevents unexpected action of the slave CPU and the subordinate control object. The power control circuit is also effective in preventing the abnormal action of the slave CPU when the power to the overall system is turned off.

Inventors

  • 👤 Kiyoshi Yamakawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 04:43
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/24; G06F1/26

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 93 words
An electronic control circuit comprising: a power source; a main control circuit which is connected to the power source; a slave control circuit which is under control of the main control circuit and is connected to the power source; and a power control circuit provided between the power source and the slave control circuit for stopping supply of power to the slave control circuit when a voltage level of the power source is lower than a predetermined value, the predetermined value being based on a minimum operable voltage of the main control circuit.
Claim 2
Dependent Claim 93 words
An electronic control circuit comprising: a power source; a main control circuit which is connected to the power source; a slave control circuit which is under control of the main control circuit and is connected to the power source; and a power control circuit provided between the power source and the slave control circuit for stopping supply of power to the slave control circuit when a voltage level of the power source is lower than a predetermined value, the predetermined value being based on a minimum operable voltage of the main control circuit.
Claim 3
Dependent Claim 59 words
An electronic control circuit according to claim 1 wherein the power control circuit (10) comprises a first switching transistor (tr1) and a second switching transistor (Tr2), the first switching transistor being provided for switching the second switching transistor depending on the predetermined value and the second switching transistor being provided on switching power supply to the slave control circuit.
Claim 4
Dependent Claim 50 words
An electronic control circuit according to claim 2 wherein the power control circuit (10) further comprises a first resistance (11) and a second resistance (12) both sequentially provided between the power source and a ground, the predetermined value being determined by the resistance values of the first and second resistances.
Claim 5
Dependent Claim 22 words
An electronic control circuit according to claim 2 wherein the predetermined value is determined by an output of the main control circuit.
Claim 6
Dependent Claim 54 words
An electronic control circuit according to claim 1 wherein the power control circuit (10) comprises a reference diode (ZD) and a switching transistor (Tr2), the reference diode being provided for determining the predetermined value by its threshold voltage value and the switching transistor being provided for switching power supply to the slave control circuit.
Claim 7
Dependent Claim 107 words
A liquid crystal display control circuit having a liquid crystal display (100) and a display driver (102, 104, 106, 108, 110) connected to the liquid crystal display, the liquid crystal display control circuit comprising: a power source (115) connected to the liquid crystal display and the display driver; and a power control circuit (130) provided between the power source (115) and the liquid crystal display (100) for stopping supply of power to the liquid crystal display (100) when a voltage level of the power source (115) is lower than a predetermined value, the predetermined value being based on a voltage below which the display driver is inoperable.
Claim 8
Dependent Claim 107 words
A liquid crystal display control circuit having a liquid crystal display (100) and a display driver (102, 104, 106, 108, 110) connected to the liquid crystal display, the liquid crystal display control circuit comprising: a power source (115) connected to the liquid crystal display and the display driver; and a power control circuit (130) provided between the power source (115) and the liquid crystal display (100) for stopping supply of power to the liquid crystal display (100) when a voltage level of the power source (115) is lower than a predetermined value, the predetermined value being based on a voltage below which the display driver is inoperable.
Claim 9
Dependent Claim 61 words
The liquid crystal display control circuit according to claim 6, wherein the power control circuit (130) comprises a first switching transistor (Tr1) and a second switching transistor (Tr2), the first switching transistor being provided for switching the second switching transistor depending on the predetermined value and the second switching transistor being provided for switching power supply to the liquid crystal display.
Claim 10
Dependent Claim 45 words
The liquid crystal display control circuit according to claim 7, wherein: the liquid crystal display control circuit comprises a CPU (135) connected to the power source and having a reset terminal; and the first switching transistor is switched by a signal from the reset terminal.

References Cited (Backward Citations)

US3787752A Cited
US4099247A Cited
US4139278A Cited
US4309701A Cited
US4365316A Cited
JPS5668027A Cited
GB2094581A Cited
JPS57168367A Cited
JPS59188706A Cited
US4713659A Cited
US4748444A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-07-17 1993-01-16 1993-07-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-07-17 1997-01-16 1997-07-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-07-17 2001-01-16 2001-07-18 $7700.00 Window Closed / Lapsed

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