US4843399A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Portable navigational communications transceiver
Assignee: NARCO AVIONICS Inc A CORP OF PA
•
Filing: 1986-07-30
•
Granted: 1989-06-27
•
Expires: 2006-07-30
Abstract
Abstract A hand held navigational-communications transceiver is compressed into a case having a volume of about 37 cubic inches by defining functional implementation for VOR (VHF omni-directional range) navigation. The transceiver can be selectively switched to process and display directional radial information. A microprocessor circuit provides primary circuitry information in combination with transceiver function software held in ROM (read only memory). A plurality of pre-programmed frequencies may be selected.
Inventors
- 👤 Robert A. Bongiorno
- 👤 John F. Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 04:52
CPC Classifications
G; G01; G01S; G01S1/00; G01S1/02; G01S1/04; G01S1/08; G01S1/44; G01S1/46
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
215 words
A navigational communications transceiver for providing radio communication, bearing information and a localizer signal indicator, comprising: antenna connection; a radio receiver circuit connected to said antenna connection; an audio amlifier circuit connected to said radio receiver circuit; a speaker connected to said audio amplifier circuit; a RF phase lock loop circuit connected to said radio receiver circuit; a microprocessor connected to said phase lock loop circuit and to said radio receiver circuit; a display connected to said microprocessor; a keyboard connected to said microprocessor; a radio transmitter circuit connected to said microprocessor; a microphone connected to said radio transmitter circuit; an output amplifier circuit connected to the output of said radio transmitter circuit, the output of said output amplifier circuit being connected to said antenna connection; a VOR phase lock loop circuit connected between said radio receiver and said microprocessor; and a programmable memory connected to said microprocessor and containing instructions: wherein said memory and the instructions thereof operate in conjunction with said microprocessor to calculate bearing information and to provide the bearing decoder function whereby the phase difference between two signals establishes an electronic counter period wherein pulses received are counted and converted into bearing information by said microprocessor under stored program instructions, this calculation being performed entirely within the microprocessor and memory structure.
Claim 2
Dependent Claim
215 words
A navigational communications transceiver for providing radio communication, bearing information and a localizer signal indicator, comprising: antenna connection; a radio receiver circuit connected to said antenna connection; an audio amlifier circuit connected to said radio receiver circuit; a speaker connected to said audio amplifier circuit; a RF phase lock loop circuit connected to said radio receiver circuit; a microprocessor connected to said phase lock loop circuit and to said radio receiver circuit; a display connected to said microprocessor; a keyboard connected to said microprocessor; a radio transmitter circuit connected to said microprocessor; a microphone connected to said radio transmitter circuit; an output amplifier circuit connected to the output of said radio transmitter circuit, the output of said output amplifier circuit being connected to said antenna connection; a VOR phase lock loop circuit connected between said radio receiver and said microprocessor; and a programmable memory connected to said microprocessor and containing instructions: wherein said memory and the instructions thereof operate in conjunction with said microprocessor to calculate bearing information and to provide the bearing decoder function whereby the phase difference between two signals establishes an electronic counter period wherein pulses received are counted and converted into bearing information by said microprocessor under stored program instructions, this calculation being performed entirely within the microprocessor and memory structure.
Claim 3
Dependent Claim
71 words
The transceiver of claim 1 wherein said microprocessor connection to said radio receiver circuit is for receiving signals therefrom; wherein said microprocessor connection to said VOR phase lock loop circuit is for receiving signals therefrom; wherein said microprocessor connection to said radio transmitter circuit is for receiving signals therefrom; and also including a connection between said RF phase lock loop circuit and said microprocessor for sending signals in both directions therebetween.
Claim 4
Dependent Claim
82 words
The transceiver of claim 2 wherein said RF phase lock loop circuit includes transmitter inhibit logic circuit connected from said RF phase lock loop circuit, said transmitter inhibit logic circuit providing an inhibit signal output and a NAV and a COM status signals output; a push to talk (PTT) logic control circuit connected on its input to the inhibit logic circuit and on its output to said radio receiver circuit; and a push to talk switch connected to said PTT logic circuit.
Claim 5
Dependent Claim
24 words
The transceiver of claim 3 wherein said transmitter inhibit logic circuit, COM and NAV status output signals are connected to said radio receiver circuit.
Claim 6
Dependent Claim
142 words
The transceiver of claim 4 wherein said radio receiver circuit includes: an RF amplifier connected to said antenna connection; a mixer circuit connected to said RF amplifier output; an IF filter connected to said mixer circuit output; an IF amplifier connected to said IF filter output; a detector circuit connected to said IF amplifier output; an A.G.C. circuit connected on its input to said detector circuit and on its outputs to said IF amplifier circuit and having inputs being said NAV and COM status signals from said transmitter inhibit logic; and to said RF amplifier circuit; a noise limiter circuit connected to the output of said detecter circuit; a volume control connected between said noise limiter output and said audio amplifier input; and a squelch circuit connected on its output to said audio amplifier and on its input to said A.G.C. circuit.
Claim 7
Dependent Claim
95 words
The transceiver of claim 5 wherein said phase lock loop circuit also includes: a voltage controlled oscillator (VCO) circuit connected on an output into said mixer circuit; a buffer amplifier connected to said VCO circuit output; a prescaler circuit connected to said buffer amplifier; an RF loop filter connected on its output to said VCO circuit and to said RF amplifier circuit; and wherein said phase lock loop circuit includes a synthesizer circuit connected on its output to said loop filter and on another output to said transmitter inhibit logic and to said prescaler circuit.
Claim 8
Dependent Claim
53 words
The transceiver of claim 6 also including an RF buffer connected to said VCO output; a buffer amplifier connected to said RF buffer; a transmitter circuit connected to said buffer amplifier; an output amplifier connected to said transmitter circuit; and a low pass filter connected between said transmitter circuit and said antenna connection.
Claim 9
Dependent Claim
72 words
The transceiver of claim 1 wherein said microprocessor includes a decoder board connected thereto, said decoder board being connected to said antenna connection and containing an operational amplifier connected to said antenna connection; an FM discriminator circuit connected to said operational amplifier; a 30 Hz FM filter connected to said FM discriminator circuit; a 30 Hz AM filter connected to said operational amplifier; and a threshold detector connected to said operational amplifier.
Claim 10
Dependent Claim
70 words
The transceiver of claim 8 also including a first zero cross over detector circuit connected to said 30 Hz AM filter output; a second zero cross over detector circuit connected to said 30 Hz FM filter output; and a differential phase counter circuit connected to said first and second zero cross over detector circuit outputs, said differential phase counter circuit being connected on its output to a said microprocessor input.
Claim 11
Dependent Claim
24 words
The transceiver of claim 9 wherein said threshold detector output is a NAV FLAG signal which is connected to an input of said microprocessor.
Claim 12
Dependent Claim
62 words
The transceiver of claim 10 wherein said differential phase counter circuit includes a pair of D-type flip flops connected in series, an output from said second flip flop being connected to said microprocessor, said first cross over detector output being connected to clock said first flip flop and said second cross over detector output being connected to clock said second flip flop.
Claim 13
Dependent Claim
23 words
The transceiver of claim 1 wherein said microprocessor includes a bearing clock circuit connected to said microprocessor to provide separate clock signals thereto.
Claim 14
Dependent Claim
33 words
The transceiver of claim 12 wherein said bearing clock circuit includes a triad of NOR gates connected to establish a bearing calculation timing clock circuit, said triad being connected to said microprocessor inputs.
Claim 15
Dependent Claim
41 words
The transceiver of claim 1 wherein said microprocessor calculation of bearing information and provision of bearing decoder function under said stored program instructions includes determining bearing angle TO a ground station and converting it into bearing angle FROM that ground station.
Claim 16
Dependent Claim
38 words
The transceiver of claim 14 wherein said microprocessor calculation also includes calculating the difference between a reference signal and 360 degrees to establish a first difference value and evaluating that first difference value with respect to 180 degrees.
Claim 17
Dependent Claim
25 words
The transceiver of claim 14 wherein said microprocessor calculation of bearing information is continually reiterative with said microprocessor being in said bearing calculation operation state.
References Cited (Backward Citations)
US3130401A
Cited
US3332080A
Cited
US3525979A
Cited
US3495248A
Cited
US3540051A
Cited
US3550127A
Cited
US3581073A
Cited
US3659291A
Cited
US3755817A
Cited
US3787860A
Cited
US3750942A
Cited
US3803617A
Cited
US3796867A
Cited
US3821523A
Cited
US3919706A
Cited
US3918662A
Cited
US3872389A
Cited
US3940763A
Cited
US4156912A
Cited
US3979057A
Cited
US4061297A
Cited
US4068308A
Cited
US4086632A
Cited
US4097922A
Cited
US4170756A
Cited
DE2756233A1
Cited
US4212067A
Cited
US4247898A
Cited
US4253149A
Cited
US4340936A
Cited
US4422076A
Cited
US4413322A
Cited
US4497034A
Cited
US4475106A
Cited
SU1114976A1
Cited
US4488108A
Cited
SU1177763A1
Cited
US4577194A
Cited
US4604625A
Cited
US4551854A
Cited
US4651282A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-06-26 | 1992-12-26 | 1993-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-06-26 | 1996-12-26 | 1997-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-06-26 | 2000-12-26 | 2001-06-27 | $7700.00 | Window Closed / Lapsed |