US4843354A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Broad band microwave biasing networks suitable for being provided in monolithic integrated circuit form
Assignee: Motorola Solutions Inc
•
Filing: 1988-11-18
•
Granted: 1989-06-27
•
Expires: 2008-11-18
Abstract
Abstract Inductorless bias networks include a bias circuit having a bias return path which is coupled to and biases a variable impedance device in a relatively nonconductive state. Another bias circuit including a FET renders the variable impedance device relatively conductive in response to control signals so that one port is coupled to another port, for instance.
Inventors
- 👤 Ronald D. Fuller
- 👤 Richard M. Dougherty
- 👤 Craig L. Fullerton
- 👤 Hugh R. Malone
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:56
CPC Classifications
H; H01; H01P; H01P1/00; H01P1/22; H01P1/10; H01P1/15; H01P1/20; H01P1/2007
Claims Analysis
Total Claims: 37
Claim 1
Independent Claim
171 words
A circuit for providing an impedance of a controlled magnitude between an input terminal and an output terminal, including in combination: a first diode responsive to changes in bias signals to provide impedances of different magnitudes, said first diode having first and second electrodes coupled between the input terminal and the output terminal; first bias means coupled to said first diode for selectively biasing said first diode in a relatively nonconductive state so that the input terminal is thereby isolated from the output terminal; means for providing control signals; and second bias means including a field effect transistor having first electrode, second electrode and control electrode, said control electrode being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said first electrode being coupled to said first diode for providing bias signals for selectively rendering said first diode relatively conductive in response to said controls signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 2
Dependent Claim
171 words
A circuit for providing an impedance of a controlled magnitude between an input terminal and an output terminal, including in combination: a first diode responsive to changes in bias signals to provide impedances of different magnitudes, said first diode having first and second electrodes coupled between the input terminal and the output terminal; first bias means coupled to said first diode for selectively biasing said first diode in a relatively nonconductive state so that the input terminal is thereby isolated from the output terminal; means for providing control signals; and second bias means including a field effect transistor having first electrode, second electrode and control electrode, said control electrode being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said first electrode being coupled to said first diode for providing bias signals for selectively rendering said first diode relatively conductive in response to said controls signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 3
Dependent Claim
13 words
The circuit of claim 1 wherein said first bias means includes resistive means.
Claim 4
Dependent Claim
16 words
The circuit of claim 1 further including bias current return means coupled to said first diode.
Claim 5
Dependent Claim
31 words
The circuit of claim 3 further including: reference conductor means; and said bias current return means includes a further field effect transistor coupled between said first diode and said reference conductor.
Claim 6
Dependent Claim
30 words
The circuit of claim 1 wherein said first diode is a PIN diode; and said field effect transistor is a MESFET so that the circuit is operable at microwave frequencies.
Claim 7
Dependent Claim
13 words
The circuit of claim 4 wherein said MESFET has a multiple gate structure.
Claim 8
Dependent Claim
168 words
The circuit of claim 1 being further adapted to selectively shunt signals occurring at a node, to a reference terminal, said circuit further including in combination: coupling means for coupling the node to said first diode; a second diode having first and second electrodes, said first electrode being coupled to the node and said second electrode being coupled to the reference terminal; a third diode having a first electrode and a second electrode, said second electrode of said third diode being coupled to said node; first power supply conductor means; third bias means coupled between said first power supply conductor means and said first electrode of said third diode; and fourth bias means including a further field effect transistor adapted to selectively provide forward biasing drive signals to said first electrode of said third diode to render said third diode conductive, said third diode thereby rendering said second diode conductive so that the signals applied to said node are coupled to said reference terminal through said second diode.
Claim 9
Dependent Claim
13 words
The circuit of claim 7 wherein said coupling means includes a capacitive means.
Claim 10
Dependent Claim
11 words
The circuit of claim 7 being provided in integrated circuit form.
Claim 11
Dependent Claim
162 words
A switching circuit for selectively connecting signals between a first terminal and a second terminal, said switching circuit including in combination: a first diode having first and second electrodes, said first electrode being coupled to the first terminal and said second electrode being coupled to the second terminal; a second diode having a first electrode and a second electrode, said second electrode of said second diode being coupled to the first terminal; first power supply conductor means; first bias means coupled between said first power supply conductor means and said first electrode of said second diode for rendering said second diode nonconductive; and second bias means including a first field effect transistor adapted to selectively provide forward biasing drive signals to said first electrode of said second diode to render said second diode conductive, said second diode thereby rendering said first diode conductive so that the signals applied to the first terminal are coupled to the second terminal through said first diode.
Claim 12
Dependent Claim
162 words
A switching circuit for selectively connecting signals between a first terminal and a second terminal, said switching circuit including in combination: a first diode having first and second electrodes, said first electrode being coupled to the first terminal and said second electrode being coupled to the second terminal; a second diode having a first electrode and a second electrode, said second electrode of said second diode being coupled to the first terminal; first power supply conductor means; first bias means coupled between said first power supply conductor means and said first electrode of said second diode for rendering said second diode nonconductive; and second bias means including a first field effect transistor adapted to selectively provide forward biasing drive signals to said first electrode of said second diode to render said second diode conductive, said second diode thereby rendering said first diode conductive so that the signals applied to the first terminal are coupled to the second terminal through said first diode.
Claim 13
Dependent Claim
15 words
The switching circuit of claim 10 further including capacitive means coupled to said first terminal.
Claim 14
Dependent Claim
194 words
The switching circuit of claim 10 further adapted for providing a controlled impedance in a path between a first port and a second port, the path being coupled to the first terminal, the switching circuit further including in combination: a third diode included in the path between the first port and the second port, said third diode having first and second electrodes; third bias means coupled to and biasing said third diode in a relatively nonconductive state so that the first port is isolated from the second port; means for providing control signals; fourth bias means coupled to said third diode for selectively rendering said third diode relatively conductive in response to said controls signals so that the first port is then selectively coupled to the second port in response to said control signals, said fourth bias means including a second field effect transistor having first electrode means, second electrode means and control electrode means, said control electrode means being coupled to said means for providing control signals such that said second field effect transistor is rendered conductive to forward bias said third diode; and bias current return means coupled to said third diode.
Claim 15
Dependent Claim
18 words
The switching circuit of claim 12 wherein said first and second field effect transistors include gallium arsenide material.
Claim 16
Dependent Claim
166 words
A variable attenuator circuit for providing a resistance of a controlled magnitude between an input terminal and an output terminal, including in combination: variable resistance means responsive to changes in bias signals to provide resistances of different magnitudes, said variable resistance means having first and second terminals coupled between the input terminal and the output terminal; means for providing control signals; and bias means including a field effect transistor having first electrode, second electrode and a plurality of control electrodes, said control electrodes being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said field effect transistor thereby being responsive to said control signals to provide bias signals of different magnitudes, said first electrode being coupled to said variable resistance means for providing said bias signals thereto for selectively rendering said variable resistance means conductive in response to said controls signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 17
Dependent Claim
166 words
A variable attenuator circuit for providing a resistance of a controlled magnitude between an input terminal and an output terminal, including in combination: variable resistance means responsive to changes in bias signals to provide resistances of different magnitudes, said variable resistance means having first and second terminals coupled between the input terminal and the output terminal; means for providing control signals; and bias means including a field effect transistor having first electrode, second electrode and a plurality of control electrodes, said control electrodes being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said field effect transistor thereby being responsive to said control signals to provide bias signals of different magnitudes, said first electrode being coupled to said variable resistance means for providing said bias signals thereto for selectively rendering said variable resistance means conductive in response to said controls signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 18
Dependent Claim
24 words
The variable attentuator circuit of claim 14 wherein said variable resistance means includes a first diode having a first electrode and a second electrode.
Claim 19
Dependent Claim
27 words
The variable attentuator circuit of claim 15 further including: reference conductor means; and bias current return means coupled between said first diode and said reference conductor means.
Claim 20
Dependent Claim
93 words
The variable attentuator circuit of claim 14 wherein said variable resistance means includes a first diode having a first electrode and a second electrode, and the variable attenuator circuit further including: reference conductor means; a second diode coupled between said first electrode of said first diode and said reference conductor means; a third diode coupled between said second electrode of said first diode and said reference conductor means; and said diodes responding to said bias signals of different magnitudes to provide resistances of different magnitudes between the input terminal and the output terminal.
Claim 21
Dependent Claim
42 words
The variable attenuator circuit of claim 14 further including: additional bias means coupled to said variable resistance means for selectively biasing said variable resistance means in a relatively nonconductive state so that the input terminal is thereby isolated from the output terminal.
Claim 22
Dependent Claim
139 words
A circuit for providing an impedance of a controlled magnitude between an input terminal and an output terminal, including in combination: a first diode responsive to changes in bias signals to provide impedances of different magnitudes, said first diode having first and second electrodes coupled between the input terminal and the output terminal; means for providing control signals; and bias means including a field effect transistor having first electrode, second electrode and control electrode, said control electrode being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said first electrode being coupled to said first diode for providing bias signals for selectively rendering said first diode relatively conductive in response to said controls signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 23
Dependent Claim
139 words
A circuit for providing an impedance of a controlled magnitude between an input terminal and an output terminal, including in combination: a first diode responsive to changes in bias signals to provide impedances of different magnitudes, said first diode having first and second electrodes coupled between the input terminal and the output terminal; means for providing control signals; and bias means including a field effect transistor having first electrode, second electrode and control electrode, said control electrode being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said first electrode being coupled to said first diode for providing bias signals for selectively rendering said first diode relatively conductive in response to said controls signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 24
Dependent Claim
38 words
The circuit of claim 19 including further bias means coupled to said first diode for selectively biasing said first diode in a relatively nonconductive state so that the input terminal is thereby selectively isolated from the output terminal.
Claim 25
Dependent Claim
13 words
The circuit of claim 20 wherein said further bias means includes resistive means.
Claim 26
Dependent Claim
16 words
The circuit of claim 19 further including bias current return means coupled to said first diode.
Claim 27
Dependent Claim
31 words
The circuit of claim 22 further including: reference conductor means; and said bias current return means includes a further field effect transistor coupled between said first diode and said reference conductor.
Claim 28
Dependent Claim
30 words
The circuit of claim 19 wherein said first diode is a PIN diode; and said field effect transistor is a MESFET so that the circuit is operable at microwave frequencies.
Claim 29
Dependent Claim
13 words
The circuit of claim 24 wherein said MESFET has a multiple gate structure.
Claim 30
Dependent Claim
144 words
The circuit of claim 19 being further adapted to selectively shunt signals occurring at a node, to a reference terminal, said circuit further including in combination: coupling means for coupling the node to said first diode; a second diode having first and second electrodes, said first electrode being coupled to the node and said second electrode being coupled to the reference terminal; a third diode having a first electrode and a second electrode, said second electrode of said third diode being coupled to said node; and second bias means including a further field effect transistor adapted to selectively provide forward biasing drive signals to said first electrode of said third diode to render said third diode conductive, said third diode thereby rendering said second diode conductive so that the signals applied to said node are coupled to the reference terminal through said second diode.
Claim 31
Dependent Claim
13 words
The circuit of claim 26 wherein said coupling means includes a capacitive means.
Claim 32
Dependent Claim
11 words
The circuit of claim 26 being provided in integrated circuit form.
Claim 33
Dependent Claim
175 words
A variable attenuator circuit for providing a resistance of a controlled magnitude between an input terminal and an output terminal, including in combination: a first diode responsive to changes in bias signals to provide resistances of different magnitudes, said first diode having first and second terminals coupled between the input terminal and the output terminal; first bias means coupled to said first diode for isolated selectively biasing said first diode in a relatively nonconductive state so that the input terminal is thereby isolated from the output terminal; means for providing control signals; and second bias means including a field effect transistor having first electrode, second electrode and control electrode, said control electrode being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said first electrode being coupled to said first diode for providing bias signals thereto for selectively rendering said first diode relatively conductive in response to said control signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 34
Dependent Claim
175 words
A variable attenuator circuit for providing a resistance of a controlled magnitude between an input terminal and an output terminal, including in combination: a first diode responsive to changes in bias signals to provide resistances of different magnitudes, said first diode having first and second terminals coupled between the input terminal and the output terminal; first bias means coupled to said first diode for isolated selectively biasing said first diode in a relatively nonconductive state so that the input terminal is thereby isolated from the output terminal; means for providing control signals; and second bias means including a field effect transistor having first electrode, second electrode and control electrode, said control electrode being coupled to said means for providing control signals to selectively render said field effect transistor conductive, said first electrode being coupled to said first diode for providing bias signals thereto for selectively rendering said first diode relatively conductive in response to said control signals so that the input terminal is selectively coupled to the output terminal in response to said control signals.
Claim 35
Dependent Claim
27 words
The variable attenuator circuit of claim 29 further including: reference conductor means; and bias current return means coupled between said first diode and said reference conductor means.
Claim 36
Dependent Claim
29 words
The variable attenuator circuit of claim 29 wherein said field effect transistor has a plurality of gates so that said field effect transistor can respond to said control signals
Claim 37
Dependent Claim
86 words
The variable attenuator circuit of claim 31 wherein further first diode has a first electrode and a second electrode, and the variable attenuator circuit further including: reference conductor means; second diode coupled between said first electrode of said first diode and said reference conductor means; third diode coupled between said second electrode of said first diode and said reference conductor means; and said diodes responding to said bias signals of different magnitudes to provide resistances of different magnitudes between the input terminal and the output terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-06-26 | 1992-12-26 | 1993-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-06-26 | 1996-12-26 | 1997-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-06-26 | 2000-12-26 | 2001-06-27 | $7700.00 | Window Closed / Lapsed |