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US4835629A Expired / Lapsed US ⏱️ 0.0 years remaining

Code error correcting circuit

Assignee: Victor Company of Japan Ltd
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Filing: 1987-09-29
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Granted: 1989-05-30
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Expires: 2007-09-29
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Abstract

Abstract In a rotary-head digital audio tape system, a reproduced digital signal contains audio data, parities P for the audio data, and parities Q for the parities P and the audio data. The reproduced digital signal is sequentially written in a memory. A code error correction circuit reads the digital signal from the memory and performs code error correction of the digital signal by use of the parities P and Q. The code error correction circuit includes a device for, during the code error correction using the parities P, reading the whole of the written digital signal from the memory. The code error correction circuit includes a device for, during code error correction using the parities Q, reading only the audio data and the parities Q corresponding to the audio data from the memory.

Inventors

  • 👤 Shoji Ueno
  • 👤 Yasuhiro Yamada
  • 👤 Yasuo Inoue

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 15:09
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 268 words
In a rotary-head digital audio tape system wherein a reproduced digital signal contains audio data, parities P, parities Q, the reproduced digital signal being sequentially written in memory, a code error correction circuit for reading the digital signal from the memory and performing code error correction of the signal by use of the parities P and Q, the code error correction circuit comprising: (a) first means for, during a code error correction using the parities P, reading the whole of the written digital signal from the memory; (b) second means for, during the code error correction using the parities P, performing code error correction of the whole of the digital signal, read from the memory and providing a corrected digital signal; (c) third means for, during the code error correction using the parities P, writing the corrected digital signal into the memory; (d) fourth means for, during a code error correction using the parities Q following the code error correction using the parities P, reading the audio data and the parities Q corresponding to the audio data from the memory without reading the P parities; (e) fifth means for, during the code error correction using the parities Q, performing error correction of the audio data and of the parities Q read by said fourth means while avoiding error correction of the parities P thereby and providing corrected audio data and corrected parities Q, to save time spent in the error correction; and (f) sixth means for, during the code error correction using the parities Q, writing the corrected audio data and the corrected parities Q into the memory.
Claim 2
Dependent Claim 268 words
In a rotary-head digital audio tape system wherein a reproduced digital signal contains audio data, parities P, parities Q, the reproduced digital signal being sequentially written in memory, a code error correction circuit for reading the digital signal from the memory and performing code error correction of the signal by use of the parities P and Q, the code error correction circuit comprising: (a) first means for, during a code error correction using the parities P, reading the whole of the written digital signal from the memory; (b) second means for, during the code error correction using the parities P, performing code error correction of the whole of the digital signal, read from the memory and providing a corrected digital signal; (c) third means for, during the code error correction using the parities P, writing the corrected digital signal into the memory; (d) fourth means for, during a code error correction using the parities Q following the code error correction using the parities P, reading the audio data and the parities Q corresponding to the audio data from the memory without reading the P parities; (e) fifth means for, during the code error correction using the parities Q, performing error correction of the audio data and of the parities Q read by said fourth means while avoiding error correction of the parities P thereby and providing corrected audio data and corrected parities Q, to save time spent in the error correction; and (f) sixth means for, during the code error correction using the parities Q, writing the corrected audio data and the corrected parities Q into the memory.
Claim 3
Dependent Claim 21 words
The code error correction circuit of claim 1 wherein said first and fourth means are composed of an address generation circuit.

References Cited (Backward Citations)

US4685004A Cited
DE3511684A1 Cited
US4670881A Cited
EP0180764A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-05-29 1992-11-28 1993-05-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-05-29 1996-11-28 1997-05-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-05-29 2000-11-28 2001-05-30 $7700.00 Window Closed / Lapsed

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