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US4835585A Expired / Lapsed US ⏱️ 0.0 years remaining

Trench gate structures

Assignee: Nokia Bell Labs
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Filing: 1984-11-26
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Granted: 1989-05-30
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Expires: 2004-11-26
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Abstract

Abstract The specification describes several forms of trench gate MOS transistors and methods for making them. The structure further includes a pair of sidewall guards on opposing sidewalls to prevent inversion of the sidewalls when the trench gate is turned on.

Inventors

  • 👤 Peter T. Panousis

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 13:07
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D64/00; H10D64/01; H10D64/011; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038; H10B12/0383; H10D30/00; H10D30/60; H10D64/025; H10D64/027; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 121 words
Device comprising: a source region of an MOS transistor formed in a semiconductor substrate, a drain region of an MOS transistor formed in the substrate, and a trench gate structure separating the source and drain said trench gate structure comprising a groove formed in the substrate the groove having substantially vertical first and second opposing pairs of sidewalls, a dielectric layer covering the bottom and said first pair of substantially vertical sidewalls, a pair of sidewall guards on said second pair of sidewalls, a gate electrode covering the dielectric layer, electrical contact means contacting the source, drain and gate, and an implant region formed into the bottom of the trench and having a resistivity less than that of surrounding substrate material.
Claim 2
Dependent Claim 121 words
Device comprising: a source region of an MOS transistor formed in a semiconductor substrate, a drain region of an MOS transistor formed in the substrate, and a trench gate structure separating the source and drain said trench gate structure comprising a groove formed in the substrate the groove having substantially vertical first and second opposing pairs of sidewalls, a dielectric layer covering the bottom and said first pair of substantially vertical sidewalls, a pair of sidewall guards on said second pair of sidewalls, a gate electrode covering the dielectric layer, electrical contact means contacting the source, drain and gate, and an implant region formed into the bottom of the trench and having a resistivity less than that of surrounding substrate material.
Claim 3
Dependent Claim 18 words
Device of claim 1 in which the implant region is formed substantially below the bottom of the trench.
Claim 4
Dependent Claim 20 words
Device of claim 1 in which the implant region is formed at and near the surface of the trench bottom.
Claim 5
Dependent Claim 128 words
A trench gate transistor comprising; source and drain regions formed into the surface of a semiconductor substrate, a trench gate separating the source and drain regions, said trench gate comprising a trench having first and second pairs of opposing sidewalls, said sidewalls being substantially vertical with respect to the substrate, the first pair of opposing sidewalls being in contact with the source and drain regions and the second pair of sidewalls extending approximately between the source and drain regions, a dielectric layer covering at least portions the first pair of sidewalls, a gate electrode covering at least portions of the dielectric layer, and a pair of sidewall guards on said second pair of sidewalls adapted to prevent inversion of the sidewalls when the trench gate is turned on.
Claim 6
Dependent Claim 128 words
A trench gate transistor comprising; source and drain regions formed into the surface of a semiconductor substrate, a trench gate separating the source and drain regions, said trench gate comprising a trench having first and second pairs of opposing sidewalls, said sidewalls being substantially vertical with respect to the substrate, the first pair of opposing sidewalls being in contact with the source and drain regions and the second pair of sidewalls extending approximately between the source and drain regions, a dielectric layer covering at least portions the first pair of sidewalls, a gate electrode covering at least portions of the dielectric layer, and a pair of sidewall guards on said second pair of sidewalls adapted to prevent inversion of the sidewalls when the trench gate is turned on.
Claim 7
Dependent Claim 33 words
The device of claim 4 in which the sidewall guards on the second pair of sidewalls comprise a dielectric layer with a thickness substantially greater than that on the first pair of sidewalls.
Claim 8
Dependent Claim 28 words
The device of claim 4 in which the sidewall guards comprise doped regions with a doping level substantially greater than the doping along the first pair of sidewalls.

References Cited (Backward Citations)

GB1202429A Cited
GB1390135A Cited
US4455740A Cited
US4324038A Cited
US4499652A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-05-29 1992-11-28 1993-05-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-05-29 1996-11-28 1997-05-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-05-29 2000-11-28 2001-05-30 $7700.00 Window Closed / Lapsed

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